diff options
| author | Joel Kitching <kitching@google.com> | 2019-03-13 18:10:52 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-19 21:43:02 +0000 |
| commit | 8d0f59935d340287b15e21f19e2f2c28fcb45cce (patch) | |
| tree | 617df5d4ab793c37f93476916d1836add4a00f3a /src/lib/coreboot_table.c | |
| parent | 55fb6b4d0d6ab4d8d5e04a1822e1889810b42ce7 (diff) | |
| download | coreboot-8d0f59935d340287b15e21f19e2f2c28fcb45cce.tar.xz | |
vboot: make vboot workbuf available to payload
Create a new cbtable entry called VBOOT_WORKBUF for
storing a pointer to the vboot workbuf within the
vboot_working_data structure.
BUG=b:124141368, b:124192753
TEST=Build and deploy to eve
TEST=util/lint/checkpatch.pl -g origin/master..HEAD
TEST=util/abuild/abuild -B -e -y -c 50 -p none -x
BRANCH=none
Change-Id: Id68f43c282939d9e1b419e927a14fe8baa290d91
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31887
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib/coreboot_table.c')
| -rw-r--r-- | src/lib/coreboot_table.c | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 960ab0f9eb..6e44f5d3d5 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -32,6 +32,7 @@ #include <cbmem.h> #include <bootmem.h> #include <spi_flash.h> +#include <security/vboot/misc.h> #include <security/vboot/vbnv_layout.h> #if CONFIG(USE_OPTION_TABLE) #include <option_table.h> @@ -206,8 +207,8 @@ static void lb_vbnv(struct lb_header *header) vbnv->range_size = VBOOT_VBNV_BLOCK_SIZE; #endif } +#endif /* CONFIG_CHROMEOS */ -#if CONFIG(VBOOT) static void lb_vboot_handoff(struct lb_header *header) { void *addr; @@ -223,10 +224,18 @@ static void lb_vboot_handoff(struct lb_header *header) vbho->range_start = (intptr_t)addr; vbho->range_size = size; } -#else -static inline void lb_vboot_handoff(struct lb_header *header) {} -#endif /* CONFIG_VBOOT */ -#endif /* CONFIG_CHROMEOS */ + +static void lb_vboot_workbuf(struct lb_header *header) +{ + struct lb_range *vbwb; + struct vboot_working_data *wd = vboot_get_working_data(); + + vbwb = (struct lb_range *)lb_new_record(header); + vbwb->tag = LB_TAB_VBOOT_WORKBUF; + vbwb->size = sizeof(*vbwb); + vbwb->range_start = (uintptr_t)wd + wd->buffer_offset; + vbwb->range_size = wd->buffer_size; +} __weak uint32_t board_id(void) { return UNDEFINED_STRAPPING_ID; } __weak uint32_t ram_code(void) { return UNDEFINED_STRAPPING_ID; } @@ -535,11 +544,16 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) /* pass along VBNV offsets in CMOS */ lb_vbnv(head); - - /* pass along the vboot_handoff address. */ - lb_vboot_handoff(head); #endif + if (CONFIG(VBOOT)) { + /* pass along the vboot_handoff address. */ + lb_vboot_handoff(head); + + /* pass along the vboot workbuf address. */ + lb_vboot_workbuf(head); + } + /* Add strapping IDs if available */ lb_board_id(head); lb_ram_code(head); |