diff options
| author | Furquan Shaikh <furquan@google.com> | 2013-07-22 16:18:31 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 08:04:10 +0100 |
| commit | 6b19071ffb89dbb68196b7f3b088d87d4fad9e80 (patch) | |
| tree | cb68ceaff1796a7798288eba1f6472154642b76a /src/lib/edid.c | |
| parent | 3d9b5a29317b9df63698abbcf743ff4d15b2892a (diff) | |
| download | coreboot-6b19071ffb89dbb68196b7f3b088d87d4fad9e80.tar.xz | |
FUI: Fill in link_m and link_n values
... based on the EDID detailed timing values for
pixel_clock and link_clock.
Two undocumented registers 0x6f040 and 0x6f044 correspond to link_m and link_n
respectively. Other two undocumented registers 0x6f030 and 0x6f034 correspond
to data_m and data_n respectively.
Calculations are based on the intel_link_compute_m_n from linux kernel.
Currently, the value for 0x6f030 does not come up right with our calculations.
Hence, set to hard-coded value.
Change-Id: I40ff411729d0a61759164c3c1098504973f9cf5e
Reviewed-on: https://gerrit.chromium.org/gerrit/62915
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/4381
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/lib/edid.c')
| -rw-r--r-- | src/lib/edid.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/lib/edid.c b/src/lib/edid.c index aa12596d89..8018967bf1 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -447,6 +447,8 @@ detailed_block(struct edid *out, unsigned char *x, int in_extension) } if (! did_detailed_timing){ + /* Edid contains pixel clock in terms of 10KHz */ + out->pixel_clock = (x[0] + (x[1] << 8)) * 10; out->ha = (x[2] + ((x[4] & 0xF0) << 4)); out->hbl = (x[3] + ((x[4] & 0x0F) << 8)); out->hso = (x[8] + ((x[11] & 0xC0) << 2)); @@ -517,11 +519,11 @@ detailed_block(struct edid *out, unsigned char *x, int in_extension) break; } - printk(BIOS_SPEW, "Detailed mode (IN HEX): Clock %d0 KHz, %x mm x %x mm\n" + printk(BIOS_SPEW, "Detailed mode (IN HEX): Clock %d KHz, %x mm x %x mm\n" " %04x %04x %04x %04x hborder %x\n" " %04x %04x %04x %04x vborder %x\n" " %chsync %cvsync%s%s %s\n", - (x[0] + (x[1] << 8)), + out->pixel_clock, (x[12] + ((x[14] & 0xF0) << 4)), (x[13] + ((x[14] & 0x0F) << 8)), out->ha, out->ha + out->hso, out->ha + out->hso + out->hspw, |