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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-09-27 08:31:02 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2018-10-01 14:32:17 +0000 |
commit | d61e347bffae29e6db179641652602226711e401 (patch) | |
tree | 8781df30c45ff2eeebbc527b1658adc0311f931c /src/lib/edid_fill_fb.c | |
parent | fc458cdc5374a293483455acdd42cdbdd032ae27 (diff) | |
download | coreboot-d61e347bffae29e6db179641652602226711e401.tar.xz |
amd/stoneyridge: Add USB settings to gnvs
A later patch will rely on two USB settings from the BIOS. Add these
to the global_gnvs_t structure.
The first is a data that will be used to locate the xHCI firmware for
reloading after a resume. Although the existing calculations will be
somewhat simple, keeping this on the coreboot side will help in the
event multiple FWs are eventually in the build.
The second item is a usable EHCI base address that may be programmed
during S3 suspend and resume. At the time the PTS and WAK code runs,
the BAR will be clear.
BUG=b:77602074
Change-Id: I32205ac8a6908cca4a38dd68a7c7b591e76c06bb
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/28766
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/lib/edid_fill_fb.c')
0 files changed, 0 insertions, 0 deletions