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author | Dennis Wassenberg <dennis.wassenberg@secunet.com> | 2014-10-14 17:29:36 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2014-10-24 10:38:26 +0200 |
commit | 498c32a6e8d06e3989cb83def86952e9301b84ee (patch) | |
tree | 97224aef583ebf521ce5d8e1d41c6f84185bac88 /src/lib/gcov-iov.h | |
parent | 7d6b0afdf5dee7e0149c7a62217ee3cdcc9b53b8 (diff) | |
download | coreboot-498c32a6e8d06e3989cb83def86952e9301b84ee.tar.xz |
siemens/sitemp_g1p1: Fix serial output for simo board
The simo board with console output at UART port 1 (COM2) will not produce
any output if CONFIG_UART_FOR_CONSOLE=1 is set correctly.
Commit f29200240e428761827ab8d179fa23068bfa9d59
(superio/ite/*: Factor out generic romstage component)
will only and always activate UART port 0 unregarded to
CONFIG_UART_FOR_CONSOLE value.
Now the UART port which was selected by CONFIG_UART_FOR_CONSOLE
will be enabled and used for console output
Change-Id: Ibbd2b5115b1ed4763962ba32fc9c19431a906c78
Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Reviewed-on: http://review.coreboot.org/7060
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/lib/gcov-iov.h')
0 files changed, 0 insertions, 0 deletions