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| author | Simon Glass <sjg@chromium.org> | 2016-09-05 11:04:50 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-10-04 21:39:51 +0200 |
| commit | 52669fc4dc4ab38e9ca61d65487fdfb809d3dd3d (patch) | |
| tree | c0e40940e7f203741e3245f9fb3f45b0c0a99a86 /src/lib/gcov-iov.h | |
| parent | 7feb86b26b2b72d21098a90bff0843d8533a7493 (diff) | |
| download | coreboot-52669fc4dc4ab38e9ca61d65487fdfb809d3dd3d.tar.xz | |
rockchip: spi: Set rxd sample delay when using high speed
At higher SPI bus speeds the SPI RX value is not available in time for
sampling at the normal time. Add a delay to ensure that we read the
correct data.
The value of 40ns is chosen arbitrarily. In my testing I can use a sample
delay of 1 even at 24MHz. But since it is not necessary, I have left that
case alone. It kicks in at 25MHz and up.
BUG=chrome-os-partner:56556
BRANCH=none
TEST=boot on gru and see no change at current speed
Change-Id: I3ef335d9a532eaef1e76034bd02e185acf11176a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e9b620c47fc3e39211487507fadb8657afdebee7
Original-Change-Id: I65d66d752cbbbee4d02f475de23a52069a0e9782
Original-Signed-off-by: Simon Glass <sjg@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/381311
Original-Commit-Ready: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Simon Glass <sjg@google.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16707
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/lib/gcov-iov.h')
0 files changed, 0 insertions, 0 deletions