diff options
author | Aaron Durbin <adurbin@chromium.org> | 2013-04-24 15:14:01 -0500 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-05-01 07:04:47 +0200 |
commit | 7e35efa83cdd6240e4f9282cc4d2703c40d472d5 (patch) | |
tree | 09091124f6b118ca5c9e5ac1c675d138174564bf /src/lib/hardwaremain.c | |
parent | e1be5ae2f485989f88ae9af92a97e0577b033155 (diff) | |
download | coreboot-7e35efa83cdd6240e4f9282cc4d2703c40d472d5.tar.xz |
ramstage: introduce boot state machine
The boot flow currently has a fixed ordering. The ordering
is dictated by the device tree and on x86 the PCI device ordering
for when actions are performed. Many of the new machines and
configurations have dependencies that do not follow the device
ordering.
In order to be more flexible the concept of a boot state machine
is introduced. At the boundaries (entry and exit) of each state there
is opportunity to run callbacks. This ability allows one to schedule
actions to be performed without adding board-specific code to
the shared boot flow.
Change-Id: I757f406c97445f6d9b69c003bb9610b16b132aa6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/3132
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/lib/hardwaremain.c')
-rw-r--r-- | src/lib/hardwaremain.c | 300 |
1 files changed, 240 insertions, 60 deletions
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index a3ee10bef2..dba47a7348 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -1,23 +1,20 @@ /* -This software and ancillary information (herein called SOFTWARE ) -called LinuxBIOS is made available under the terms described -here. The SOFTWARE has been approved for release with associated -LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has -been authored by an employee or employees of the University of -California, operator of the Los Alamos National Laboratory under -Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The -U.S. Government has rights to use, reproduce, and distribute this -SOFTWARE. The public may copy, distribute, prepare derivative works -and publicly display this SOFTWARE without charge, provided that this -Notice and any statement of authorship are reproduced on all copies. -Neither the Government nor the University makes any warranty, express -or implied, or assumes any liability or responsibility for the use of -this SOFTWARE. If SOFTWARE is modified to produce derivative works, -such modified SOFTWARE should be clearly marked, so as not to confuse -it with the version available from LANL. - */ -/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL - * rminnich@lanl.gov + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ @@ -25,6 +22,7 @@ it with the version available from LANL. * C Bootstrap code for the coreboot */ +#include <bootstate.h> #include <console/console.h> #include <version.h> #include <device/device.h> @@ -43,80 +41,127 @@ it with the version available from LANL. #include <coverage.h> #include <timestamp.h> -/** - * @brief Main function of the RAM part of coreboot. - * - * Coreboot is divided into Pre-RAM part and RAM part. - * - * Device Enumeration: - * In the dev_enumerate() phase, - */ - -void hardwaremain(int boot_complete); - -void hardwaremain(int boot_complete) -{ - struct lb_memory *lb_mem; - void *payload; - - timestamp_stash(TS_START_RAMSTAGE); - post_code(POST_ENTRY_RAMSTAGE); - -#if CONFIG_COVERAGE - coverage_init(); +#if BOOT_STATE_DEBUG +#define BS_DEBUG_LVL BIOS_DEBUG +#else +#define BS_DEBUG_LVL BIOS_NEVER #endif - /* console_init() MUST PRECEDE ALL printk()! */ - console_init(); - - post_code(POST_CONSOLE_READY); - - printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", - coreboot_version, coreboot_extra_version, coreboot_build, - (boot_complete)?"rebooting":"booting"); - - post_code(POST_CONSOLE_BOOT_MSG); - - /* If we have already booted attempt a hard reboot */ - if (boot_complete) { - hard_reset(); +static boot_state_t bs_pre_device(void *arg); +static boot_state_t bs_dev_init_chips(void *arg); +static boot_state_t bs_dev_enumerate(void *arg); +static boot_state_t bs_dev_resources(void *arg); +static boot_state_t bs_dev_eanble(void *arg); +static boot_state_t bs_dev_init(void *arg); +static boot_state_t bs_post_device(void *arg); +static boot_state_t bs_os_resume(void *arg); +static boot_state_t bs_write_tables(void *arg); +static boot_state_t bs_payload_load(void *arg); +static boot_state_t bs_payload_boot(void *arg); + +struct boot_state { + const char *name; + boot_state_t id; + struct boot_state_callback *seq_callbacks[2]; + boot_state_t (*run_state)(void *arg); + void *arg; + int complete; +}; + +#define BS_INIT(state_, run_func_) \ + { \ + .name = #state_, \ + .id = state_, \ + .seq_callbacks = { NULL, NULL },\ + .run_state = run_func_, \ + .arg = NULL, \ + .complete = 0 \ } - - /* FIXME: Is there a better way to handle this? */ - init_timer(); - +#define BS_INIT_ENTRY(state_, run_func_) \ + [state_] = BS_INIT(state_, run_func_) + +static struct boot_state boot_states[] = { + BS_INIT_ENTRY(BS_PRE_DEVICE, bs_pre_device), + BS_INIT_ENTRY(BS_DEV_INIT_CHIPS, bs_dev_init_chips), + BS_INIT_ENTRY(BS_DEV_ENUMERATE, bs_dev_enumerate), + BS_INIT_ENTRY(BS_DEV_RESOURCES, bs_dev_resources), + BS_INIT_ENTRY(BS_DEV_ENABLE, bs_dev_eanble), + BS_INIT_ENTRY(BS_DEV_INIT, bs_dev_init), + BS_INIT_ENTRY(BS_POST_DEVICE, bs_post_device), + BS_INIT_ENTRY(BS_OS_RESUME, bs_os_resume), + BS_INIT_ENTRY(BS_WRITE_TABLES, bs_write_tables), + BS_INIT_ENTRY(BS_PAYLOAD_LOAD, bs_payload_load), + BS_INIT_ENTRY(BS_PAYLOAD_BOOT, bs_payload_boot), +}; + +static boot_state_t bs_pre_device(void *arg) +{ init_cbmem_pre_device(); + return BS_DEV_INIT_CHIPS; +} +static boot_state_t bs_dev_init_chips(void *arg) +{ timestamp_stash(TS_DEVICE_ENUMERATE); /* Initialize chips early, they might disable unused devices. */ dev_initialize_chips(); + return BS_DEV_ENUMERATE; +} + +static boot_state_t bs_dev_enumerate(void *arg) +{ /* Find the devices we don't have hard coded knowledge about. */ dev_enumerate(); post_code(POST_DEVICE_ENUMERATION_COMPLETE); + return BS_DEV_RESOURCES; +} + +static boot_state_t bs_dev_resources(void *arg) +{ timestamp_stash(TS_DEVICE_CONFIGURE); /* Now compute and assign the bus resources. */ dev_configure(); post_code(POST_DEVICE_CONFIGURATION_COMPLETE); + return BS_DEV_ENABLE; +} + +static boot_state_t bs_dev_eanble(void *arg) +{ timestamp_stash(TS_DEVICE_ENABLE); /* Now actually enable devices on the bus */ dev_enable(); post_code(POST_DEVICES_ENABLED); + return BS_DEV_INIT; +} + +static boot_state_t bs_dev_init(void *arg) +{ timestamp_stash(TS_DEVICE_INITIALIZE); /* And of course initialize devices on the bus */ dev_initialize(); post_code(POST_DEVICES_INITIALIZED); + return BS_POST_DEVICE; +} + +static boot_state_t bs_post_device(void *arg) +{ timestamp_stash(TS_DEVICE_DONE); init_cbmem_post_device(); timestamp_sync(); + return BS_OS_RESUME; +} + +static boot_state_t bs_os_resume(void *arg) +{ #if CONFIG_HAVE_ACPI_RESUME suspend_resume(); post_code(0x8a); @@ -124,6 +169,11 @@ void hardwaremain(int boot_complete) timestamp_add_now(TS_CBMEM_POST); + return BS_WRITE_TABLES; +} + +static boot_state_t bs_write_tables(void *arg) +{ if (cbmem_post_handling) cbmem_post_handling(); @@ -132,7 +182,14 @@ void hardwaremain(int boot_complete) /* Now that we have collected all of our information * write our configuration tables. */ - lb_mem = write_tables(); + write_tables(); + + return BS_PAYLOAD_LOAD; +} + +static boot_state_t bs_payload_load(void *arg) +{ + void *payload; timestamp_add_now(TS_LOAD_PAYLOAD); @@ -141,7 +198,130 @@ void hardwaremain(int boot_complete) if (! payload) die("Could not find a payload\n"); - selfboot(lb_mem, payload); + /* Pass the payload to the next state. */ + boot_states[BS_PAYLOAD_BOOT].arg = payload; + + return BS_PAYLOAD_BOOT; +} + +static boot_state_t bs_payload_boot(void *payload) +{ + selfboot(get_lb_mem(), payload); + printk(BIOS_EMERG, "Boot failed"); + /* Returning from this state will fail because the following signals + * return to a completed state. */ + return BS_PAYLOAD_BOOT; +} + +static void bs_call_callbacks(struct boot_state *state, + boot_state_sequence_t seq) +{ + while (state->seq_callbacks[seq] != NULL) { + struct boot_state_callback *bscb; + + /* Remove the first callback. */ + bscb = state->seq_callbacks[seq]; + state->seq_callbacks[seq] = bscb->next; + bscb->next = NULL; + +#if BOOT_STATE_DEBUG + printk(BS_DEBUG_LVL, "BS: callback (%p) @ %s.\n", + bscb, bscb->location); +#endif + bscb->callback(bscb->arg); + } +} + +static void bs_walk_state_machine(boot_state_t current_state_id) +{ + + while (1) { + struct boot_state *state; + + state = &boot_states[current_state_id]; + + if (state->complete) { + printk(BIOS_EMERG, "BS: %s state already executed.\n", + state->name); + break; + } + + printk(BS_DEBUG_LVL, "BS: Entering %s state.\n", state->name); + bs_call_callbacks(state, BS_ON_ENTRY); + + current_state_id = state->run_state(state->arg); + + printk(BS_DEBUG_LVL, "BS: Exiting %s state.\n", state->name); + bs_call_callbacks(state, BS_ON_EXIT); + + state->complete = 1; + } +} + +static int boot_state_sched_callback(struct boot_state *state, + struct boot_state_callback *bscb, + boot_state_sequence_t seq) +{ + if (state->complete) { + printk(BIOS_WARNING, + "Tried to schedule callback on completed state %s.\n", + state->name); + + return -1; + } + + bscb->next = state->seq_callbacks[seq]; + state->seq_callbacks[seq] = bscb; + + return 0; +} + +int boot_state_sched_on_entry(struct boot_state_callback *bscb, + boot_state_t state_id) +{ + struct boot_state *state = &boot_states[state_id]; + + return boot_state_sched_callback(state, bscb, BS_ON_ENTRY); +} + +int boot_state_sched_on_exit(struct boot_state_callback *bscb, + boot_state_t state_id) +{ + struct boot_state *state = &boot_states[state_id]; + + return boot_state_sched_callback(state, bscb, BS_ON_EXIT); +} + +void hardwaremain(int boot_complete) +{ + timestamp_stash(TS_START_RAMSTAGE); + post_code(POST_ENTRY_RAMSTAGE); + +#if CONFIG_COVERAGE + coverage_init(); +#endif + + /* console_init() MUST PRECEDE ALL printk()! */ + console_init(); + + post_code(POST_CONSOLE_READY); + + printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", + coreboot_version, coreboot_extra_version, coreboot_build, + (boot_complete)?"rebooting":"booting"); + + post_code(POST_CONSOLE_BOOT_MSG); + + /* If we have already booted attempt a hard reboot */ + if (boot_complete) { + hard_reset(); + } + + /* FIXME: Is there a better way to handle this? */ + init_timer(); + + bs_walk_state_machine(BS_PRE_DEVICE); + die("Boot state machine failure.\n"); } |