diff options
author | Yen Lin <yelin@nvidia.com> | 2015-09-08 15:13:13 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-17 14:17:16 +0000 |
commit | 741537e1d99ed7465f5a7e74089667ef1d3a5bfc (patch) | |
tree | 4d3e728fa61a6e06a9552a02affe61d59a54ba7f /src/lib/imd_cbmem.c | |
parent | b090a268a2e993fc7fa719ab3b9b7283034c9d10 (diff) | |
download | coreboot-741537e1d99ed7465f5a7e74089667ef1d3a5bfc.tar.xz |
t210: lp0_resume: Configure unused SDMMC1/3 pads for low power leakage
In LP0 resume, a couple of SDMMCx pad settings need to be set to 0 to
reduce power leakage.
BUG=None
BRANCH=None
TEST=Tested on Smaug; able to suspend/resume >100 times
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9f35a90a8af2180443db2c4be75d4566d0990de5
Original-Change-Id: Ifc946b0cea437ef0807cea0c11609d8e09387e8e
Original-Signed-off-by: Yen Lin <yelin@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/298195
Original-Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Tested-by: Joseph Lo <josephl@nvidia.com>
Original-(cherry picked from commit be3ac49a6bc4c9088d3799555d69c87c8ce1693c)
Original-Reviewed-on: https://chromium-review.googlesource.com/298154
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Change-Id: If5d5cebc89b8220480b3c72293a410e782eb437e
Reviewed-on: http://review.coreboot.org/11656
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/lib/imd_cbmem.c')
0 files changed, 0 insertions, 0 deletions