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author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2019-12-17 00:05:44 -0800 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-01-08 06:32:17 +0000 |
commit | 6e3379784120a16a2f865c545404d0deb4074322 (patch) | |
tree | 4b2d780679018cae0120627da474dd370d6240d2 /src/lib/memchr.c | |
parent | 0c89c297e6a582dd9c161bef88b6fc7d7ed43d0c (diff) | |
download | coreboot-6e3379784120a16a2f865c545404d0deb4074322.tar.xz |
soc/intel/tigerlake: Fix PMC config
Fix PMC base address for tigerlake.
BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Change-Id: Id13222eb5498a5704c11d6b4d1e83212bd8b2723
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/lib/memchr.c')
0 files changed, 0 insertions, 0 deletions