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| author | Felix Singer <felixsinger@posteo.net> | 2021-05-07 21:25:17 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-10 14:14:24 +0000 |
| commit | 1f44efc2028575fcf940ef188f62bf3730a3d81d (patch) | |
| tree | fb22629e3e3f99a3845eb0d9b67fb8bde2f6889b /src/lib/rtc.c | |
| parent | 4caa05e4ce566473d408831f06d958789f55c245 (diff) | |
| download | coreboot-1f44efc2028575fcf940ef188f62bf3730a3d81d.tar.xz | |
soc/intel/skylake: Set proper defaults in chipset devicetree
LPC, P2SB and Power Management controller are always needed. Thus,
enable them by default.
Change-Id: I20b8cbe536da70fccc3d11e1eedf4a5e14bfc862
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/lib/rtc.c')
0 files changed, 0 insertions, 0 deletions