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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2019-10-27 15:07:00 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-11-04 22:07:05 +0000 |
| commit | c4f77d943adcaeabb391f3f84e45d5fc7cdc12f6 (patch) | |
| tree | 9c5d437113e2f21e100d914d5948351c1f3716ca /src/lib/rtc.c | |
| parent | facbf472244876049df61ea0b9577fac9722b08d (diff) | |
| download | coreboot-c4f77d943adcaeabb391f3f84e45d5fc7cdc12f6.tar.xz | |
mb/asrock/h110m: use SSDT generator for SuperIO
Modifies the device tree to use the ACPI SSDT generator[1] for NCT6791D
SuperIO, dropping the need to include code from the superio.asl, which
was inherited from another chip (NCT6776) and required fixes. SSDT gen
support for Nuvoton NCT6791D chip was added in the previous patch [2].
[1] https://review.coreboot.org/c/coreboot/+/33033
[2] https://review.coreboot.org/c/coreboot/+/36379
Change-Id: I57b67d10968e5e035536bcb0d8329ce09d50194b
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/lib/rtc.c')
0 files changed, 0 insertions, 0 deletions