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| author | Shankar, Vaibhav <vaibhav.shankar@intel.com> | 2016-07-18 12:07:34 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-02 18:40:15 +0200 |
| commit | d5817c887e2d0719fedaf89303bf72d04bf6be0f (patch) | |
| tree | c4b6864ccbc50ef48a3b496f239b24f74b37e64d /src/lib/timestamp.c | |
| parent | 67d169721ade4e4d9ca827a4817894522696b5de (diff) | |
| download | coreboot-d5817c887e2d0719fedaf89303bf72d04bf6be0f.tar.xz | |
intel/amenia: Add GPIO changes to assert SLP_S0/Reset signal
PMIC/PMU: Set the iosstates for PMIC to assert the reset
signal, PMU to assert SLP_S0 signal.
Change-Id: Iec2dd659ea21f07d0bfe74194756786375cf775c
Signed-off-by: Shankar, Vaibhav <vaibhav.shankar@intel.com>
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Reviewed-on: https://review.coreboot.org/15777
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/lib/timestamp.c')
0 files changed, 0 insertions, 0 deletions