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authorAamir Bohra <aamir.bohra@intel.com>2019-09-10 08:51:02 +0530
committerFurquan Shaikh <furquan@google.com>2019-09-12 06:20:10 +0000
commit8dda419b3cb55b47970ed3dcd9f942910ace43ff (patch)
treee98c6d3e32a0b8c35ac549c061a1202180586c68 /src/lib/timestamp.c
parent87bb5f5e7a4476a2e9a70cc8d234fa0b479f1e26 (diff)
downloadcoreboot-8dda419b3cb55b47970ed3dcd9f942910ace43ff.tar.xz
mb/google/hatch: Configure SATA DEVSLP pad reset config to PLT_RST
BUG=b:133000685 Change-Id: Ia12174e3254153dbca55070f5daf84fd8aac51d0 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35307 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: V Sowmya <v.sowmya@intel.com>
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