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author | Kerry She <shekairui@gmail.com> | 2011-08-18 18:44:00 +0800 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-09-07 01:10:05 +0200 |
commit | 6209c8299a4bdcdb51cd6bf0c43c571ed575ad96 (patch) | |
tree | 843a812c073191dd08315f3a4791f0b66480208d /src/lib/uart8250.c | |
parent | feed329a0c006968242aa3065506b5f37f4308d4 (diff) | |
download | coreboot-6209c8299a4bdcdb51cd6bf0c43c571ed575ad96.tar.xz |
AMD SB800 southbridge update
This patch enables access to the registers of the hardware monitor
logical device in the superio via isa ports 0x295/0x296.
Previously this was not enabled in the SB8xx LPC device.
This is required for initialisation in init_hwm() in
src/superio/winbond/w83627hf/superio.c and also by OS-level
sensor monitoring such as lm-sensors to access temperature,
fan monitoring and control and voltage registers.
asrock/e350m1 and advansus/a785e-i mainboard changes are included herein.
Change-Id: I2176885549277b335c0c41b48457d09b9b76b703
Signed-off-by: Per Hansen <perh52@runbox.com>
Signed-off-by: Kerry She <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/159
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/lib/uart8250.c')
0 files changed, 0 insertions, 0 deletions