summaryrefslogtreecommitdiff
path: root/src/lib
diff options
context:
space:
mode:
authorJulius Werner <jwerner@chromium.org>2013-08-27 15:48:32 -0700
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-08-13 00:04:14 +0200
commitb8fad3d02986222fa162d455eca2ffe807b6a15a (patch)
treef6beaf474faa9f4a9a4a611abb52774e7d0906ed /src/lib
parent4498f6a6e57aa3bc1ed9449e3ad153b1a60c4eb6 (diff)
downloadcoreboot-b8fad3d02986222fa162d455eca2ffe807b6a15a.tar.xz
arm: libpayload: Add cache coherent DMA memory definition and management
This patch adds a mechanism to set aside a region of cache-coherent (i.e. usually uncached) virtual memory, which can be used to communicate with DMA devices without automatic cache snooping (common on ARM) without the need of explicit flush/invalidation instructions in the driver code. This works by setting aside said region in the (board-specific) page table setup, as exemplary done in this patch for the Snow and Pit boards. It uses a new mechanism for adding board-specific Coreboot table entries to describe this region in an entry with the LB_DMA tag. Libpayload's memory allocator is enhanced to be able to operate on distinct types/regions of memory. It provides dma_malloc() and dma_memalign() functions for use in drivers, which by default just operate on the same heap as their traditional counterparts. However, if the Coreboot table parsing code finds a CB_DMA section, further requests through the dma_xxx() functions will return memory from the region described therein instead. Change-Id: Ia9c249249e936bbc3eb76e7b4822af2230ffb186 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/167155 (cherry picked from commit d142ccdcd902a9d6ab4d495fbe6cbe85c61a5f01) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6622 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/coreboot_table.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index f0ae6c5bc0..9f9c453a5b 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -77,7 +77,7 @@ static struct lb_record *lb_last_record(struct lb_header *header)
return rec;
}
-static struct lb_record *lb_new_record(struct lb_header *header)
+struct lb_record *lb_new_record(struct lb_header *header)
{
struct lb_record *rec;
rec = lb_last_record(header);
@@ -298,6 +298,8 @@ static void lb_strings(struct lb_header *header)
}
+void __attribute__((weak)) lb_board(struct lb_header *header) { /* NOOP */ }
+
static struct lb_forward *lb_forward(struct lb_header *header, struct lb_header *next_header)
{
struct lb_record *rec;
@@ -425,6 +427,9 @@ unsigned long write_coreboot_table(
#endif
add_cbmem_pointers(head);
+ /* Add board-specific table entries, if any. */
+ lb_board(head);
+
/* Remember where my valid memory ranges are */
return lb_table_fini(head);
}