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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-17 22:39:29 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-18 20:59:12 +0100 |
| commit | de01136484c58d13457ccf1e42fdb2310f3cbe65 (patch) | |
| tree | 86a7e28d7249ab7e605319d92a21211aa467d598 /src/lib | |
| parent | b17f4e8d26b34541cade48add2a213454008d3f1 (diff) | |
| download | coreboot-de01136484c58d13457ccf1e42fdb2310f3cbe65.tar.xz | |
intel post-car: Increase stacktop alignment
Align top of stack to 8 bytes, value documented as FSP1.1 requirement.
Also fix some cases of uintptr_t casted to unsigned long.
Change-Id: I5bbd100eeb673417da205a2c2c3410fef1af61f0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17461
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/lib')
| -rw-r--r-- | src/lib/romstage_stack.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/lib/romstage_stack.c b/src/lib/romstage_stack.c index fde9d1b9b2..ed6f09b4cb 100644 --- a/src/lib/romstage_stack.c +++ b/src/lib/romstage_stack.c @@ -44,5 +44,8 @@ uintptr_t romstage_ram_stack_top(void) uintptr_t stack_top = romstage_ram_stack_base(ROMSTAGE_RAM_STACK_SIZE, ROMSTAGE_STACK_CBMEM); stack_top += ROMSTAGE_RAM_STACK_SIZE; + + /* Make it aligned to a 8-byte boundary. */ + stack_top = ALIGN_DOWN(stack_top, 8); return stack_top; } |