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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-07 06:31:43 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-11 08:33:54 +0000 |
| commit | a48433d39be4002061e8882a9c6a009a497166eb (patch) | |
| tree | cfd77b97ab72014b1a77ee4fb8b2c40e1f325f60 /src/lib | |
| parent | 3e70690f2a5c7c938784e7e42ecef3d0fb3687f9 (diff) | |
| download | coreboot-a48433d39be4002061e8882a9c6a009a497166eb.tar.xz | |
selfboot: Move x86 quirk under arch
Making exceptions for some payload to be loaded near
and under 1 MiB boundary sounds like a legacy 16-bit
x86 BIOS thing we generally do not want under lib/.
Change-Id: I8e8336a03d6f06d8f022c880a8334fe19a777f0a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/lib')
| -rw-r--r-- | src/lib/selfboot.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index 1cf32e5bd7..42f7efcc28 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -333,9 +333,13 @@ static int build_self_segment_list( return 1; } +__weak int payload_arch_usable_ram_quirk(uint64_t start, uint64_t size) +{ + return 0; +} + static int payload_targets_usable_ram(struct segment *head) { - const unsigned long one_meg = (1UL << 20); struct segment *ptr; for (ptr = head->next; ptr != head; ptr = ptr->next) { @@ -343,13 +347,8 @@ static int payload_targets_usable_ram(struct segment *head) ptr->s_memsz)) continue; - if (ptr->s_dstaddr < one_meg && - (ptr->s_dstaddr + ptr->s_memsz) <= one_meg) { - printk(BIOS_DEBUG, - "Payload being loaded at below 1MiB " - "without region being marked as RAM usable.\n"); + if (payload_arch_usable_ram_quirk(ptr->s_dstaddr, ptr->s_memsz)) continue; - } /* Payload segment not targeting RAM. */ printk(BIOS_ERR, "SELF Payload doesn't target RAM:\n"); |