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authorJulius Werner <jwerner@chromium.org>2019-03-05 16:53:33 -0800
committerPatrick Georgi <pgeorgi@google.com>2019-03-08 08:33:24 +0000
commitcd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch)
tree8e89136e2da7cf54453ba8c112eda94415b56242 /src/lib
parentb3a8cc54dbaf833c590a56f912209a5632b71f49 (diff)
downloadcoreboot-cd49cce7b70e80b4acc49b56bb2bb94370b4d867.tar.xz
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/bootblock.c8
-rw-r--r--src/lib/bootmode.c2
-rw-r--r--src/lib/cbfs.c14
-rw-r--r--src/lib/cbmem_console.c2
-rw-r--r--src/lib/coreboot_table.c28
-rw-r--r--src/lib/decompressor.c6
-rw-r--r--src/lib/edid.c2
-rw-r--r--src/lib/fallback_boot.c4
-rw-r--r--src/lib/gcov-glue.c14
-rw-r--r--src/lib/hardwaremain.c24
-rw-r--r--src/lib/imd_cbmem.c6
-rw-r--r--src/lib/libgcc.c4
-rw-r--r--src/lib/malloc.c2
-rw-r--r--src/lib/prog_loaders.c16
-rw-r--r--src/lib/program.ld8
-rw-r--r--src/lib/ramtest.c4
-rw-r--r--src/lib/reg_script.c10
-rw-r--r--src/lib/reset.c2
-rw-r--r--src/lib/spd_bin.c4
-rw-r--r--src/lib/timestamp.c8
20 files changed, 84 insertions, 84 deletions
diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c
index 037e913e93..43674effc7 100644
--- a/src/lib/bootblock.c
+++ b/src/lib/bootblock.c
@@ -33,7 +33,7 @@ asmlinkage void bootblock_main_with_timestamp(uint64_t base_timestamp,
struct timestamp_entry *timestamps, size_t num_timestamps)
{
/* Initialize timestamps if we have TIMESTAMP region in memlayout.ld. */
- if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) &&
+ if (CONFIG(COLLECT_TIMESTAMPS) &&
REGION_SIZE(timestamp) > 0) {
int i;
timestamp_init(base_timestamp);
@@ -48,7 +48,7 @@ asmlinkage void bootblock_main_with_timestamp(uint64_t base_timestamp,
bootblock_soc_early_init();
bootblock_mainboard_early_init();
- if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) {
+ if (CONFIG(BOOTBLOCK_CONSOLE)) {
console_init();
exception_init();
}
@@ -65,13 +65,13 @@ void main(void)
init_timer();
- if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS))
+ if (CONFIG(COLLECT_TIMESTAMPS))
base_timestamp = timestamp_get();
bootblock_main_with_timestamp(base_timestamp, NULL, 0);
}
-#if IS_ENABLED(CONFIG_COMPRESS_BOOTBLOCK)
+#if CONFIG(COMPRESS_BOOTBLOCK)
/*
* This is the bootblock entry point when it is run after a decompressor stage.
* For non-decompressor builds, _start is generally defined in architecture-
diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c
index 29682eb54d..e402536fde 100644
--- a/src/lib/bootmode.c
+++ b/src/lib/bootmode.c
@@ -35,7 +35,7 @@ void gfx_set_init_done(int done)
int display_init_required(void)
{
/* For Chrome OS always honor vboot_handoff_skip_display_init(). */
- if (IS_ENABLED(CONFIG_CHROMEOS))
+ if (CONFIG(CHROMEOS))
return !vboot_handoff_skip_display_init();
/* By default always initialize display. */
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 3e2ccf3db4..728674f0da 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -30,7 +30,7 @@
#define ERROR(x...) printk(BIOS_ERR, "CBFS: " x)
#define LOG(x...) printk(BIOS_INFO, "CBFS: " x)
-#if IS_ENABLED(CONFIG_DEBUG_CBFS)
+#if CONFIG(DEBUG_CBFS)
#define DEBUG(x...) printk(BIOS_SPEW, "CBFS: " x)
#else
#define DEBUG(x...)
@@ -113,7 +113,7 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
case CBFS_COMPRESS_LZ4:
if ((ENV_BOOTBLOCK || ENV_VERSTAGE) &&
- !IS_ENABLED(CONFIG_COMPRESS_PRERAM_STAGES))
+ !CONFIG(COMPRESS_PRERAM_STAGES))
return 0;
/* Load the compressed image to the end of the available memory
@@ -133,10 +133,10 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
/* We assume here romstage and postcar are never compressed. */
if (ENV_BOOTBLOCK || ENV_VERSTAGE)
return 0;
- if (ENV_ROMSTAGE && IS_ENABLED(CONFIG_POSTCAR_STAGE))
+ if (ENV_ROMSTAGE && CONFIG(POSTCAR_STAGE))
return 0;
if ((ENV_ROMSTAGE || ENV_POSTCAR)
- && !IS_ENABLED(CONFIG_COMPRESS_RAMSTAGE))
+ && !CONFIG(COMPRESS_RAMSTAGE))
return 0;
void *map = rdev_mmap(rdev, offset, in_size);
if (map == NULL)
@@ -255,8 +255,8 @@ int cbfs_prog_stage_load(struct prog *pstage)
/* Hacky way to not load programs over read only media. The stages
* that would hit this path initialize themselves. */
- if (ENV_VERSTAGE && !IS_ENABLED(CONFIG_NO_XIP_EARLY_STAGES) &&
- IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)) {
+ if (ENV_VERSTAGE && !CONFIG(NO_XIP_EARLY_STAGES) &&
+ CONFIG(BOOT_DEVICE_MEMORY_MAPPED)) {
void *mapping = rdev_mmap(fh, foffset, fsize);
rdev_munmap(fh, mapping);
if (mapping == load)
@@ -332,7 +332,7 @@ const struct cbfs_locator __weak cbfs_master_header_locator = {
extern const struct cbfs_locator vboot_locator;
static const struct cbfs_locator *locators[] = {
-#if IS_ENABLED(CONFIG_VBOOT)
+#if CONFIG(VBOOT)
/*
* NOTE: Does not link in SMM, as the vboot_locator isn't compiled.
* ATM there's no need for VBOOT functionality in SMM and it's not
diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c
index b05b747bf2..32851ca2d9 100644
--- a/src/lib/cbmem_console.c
+++ b/src/lib/cbmem_console.c
@@ -184,7 +184,7 @@ ROMSTAGE_CBMEM_INIT_HOOK(cbmemc_reinit)
RAMSTAGE_CBMEM_INIT_HOOK(cbmemc_reinit)
POSTCAR_CBMEM_INIT_HOOK(cbmemc_reinit)
-#if IS_ENABLED(CONFIG_CONSOLE_CBMEM_DUMP_TO_UART)
+#if CONFIG(CONSOLE_CBMEM_DUMP_TO_UART)
void cbmem_dump_console(void)
{
struct cbmem_console *cbm_cons_p;
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index c2ae0949ed..960ab0f9eb 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -33,11 +33,11 @@
#include <bootmem.h>
#include <spi_flash.h>
#include <security/vboot/vbnv_layout.h>
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
#include <option_table.h>
#endif
-#if IS_ENABLED(CONFIG_CHROMEOS)
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(CHROMEOS)
+#if CONFIG(HAVE_ACPI_TABLES)
#include <arch/acpi.h>
#endif
#include <vendorcode/google/chromeos/chromeos.h>
@@ -136,7 +136,7 @@ static void lb_framebuffer(struct lb_header *header)
struct lb_framebuffer *framebuffer;
struct lb_framebuffer fb = {0};
- if (!IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER) || fill_lb_framebuffer(&fb))
+ if (!CONFIG(LINEAR_FRAMEBUFFER) || fill_lb_framebuffer(&fb))
return;
framebuffer = (struct lb_framebuffer *)lb_new_record(header);
@@ -155,7 +155,7 @@ void lb_add_gpios(struct lb_gpios *gpios, const struct lb_gpio *gpio_table,
gpios->size += table_size;
}
-#if IS_ENABLED(CONFIG_CHROMEOS)
+#if CONFIG(CHROMEOS)
static void lb_gpios(struct lb_header *header)
{
struct lb_gpios *gpios;
@@ -196,7 +196,7 @@ static void lb_gpios(struct lb_header *header)
static void lb_vbnv(struct lb_header *header)
{
-#if IS_ENABLED(CONFIG_PC80_SYSTEM)
+#if CONFIG(PC80_SYSTEM)
struct lb_range *vbnv;
vbnv = (struct lb_range *)lb_new_record(header);
@@ -207,7 +207,7 @@ static void lb_vbnv(struct lb_header *header)
#endif
}
-#if IS_ENABLED(CONFIG_VBOOT)
+#if CONFIG(VBOOT)
static void lb_vboot_handoff(struct lb_header *header)
{
void *addr;
@@ -373,7 +373,7 @@ static struct lb_mainboard *lb_mainboard(struct lb_header *header)
return mainboard;
}
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header)
{
struct lb_record *rec;
@@ -489,7 +489,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
head = lb_table_init(rom_table_end);
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
{
struct cmos_option_table *option_table =
cbfs_boot_map_with_leak("cmos_layout.bin",
@@ -516,10 +516,10 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
lb_mainboard(head);
/* Record the serial ports and consoles */
-#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
+#if CONFIG(CONSOLE_SERIAL)
uart_fill_lb(head);
#endif
-#if IS_ENABLED(CONFIG_CONSOLE_USB)
+#if CONFIG(CONSOLE_USB)
lb_add_console(LB_TAG_CONSOLE_EHCI, head);
#endif
@@ -529,7 +529,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
/* Record our framebuffer */
lb_framebuffer(head);
-#if IS_ENABLED(CONFIG_CHROMEOS)
+#if CONFIG(CHROMEOS)
/* Record our GPIO settings (ChromeOS specific) */
lb_gpios(head);
@@ -546,7 +546,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
lb_sku_id(head);
/* Add SPI flash description if available */
- if (IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
+ if (CONFIG(BOOT_DEVICE_SPI_FLASH))
lb_spi_flash(head);
add_cbmem_pointers(head);
@@ -554,7 +554,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
/* Add board-specific table entries, if any. */
lb_board(head);
-#if IS_ENABLED(CONFIG_CHROMEOS_RAMOOPS)
+#if CONFIG(CHROMEOS_RAMOOPS)
lb_ramoops(head);
#endif
diff --git a/src/lib/decompressor.c b/src/lib/decompressor.c
index 7a5bf3b289..0529d11390 100644
--- a/src/lib/decompressor.c
+++ b/src/lib/decompressor.c
@@ -52,18 +52,18 @@ void main(void)
{
init_timer();
- if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS))
+ if (CONFIG(COLLECT_TIMESTAMPS))
arg.base_timestamp = timestamp_get();
decompressor_soc_init();
- if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS))
+ if (CONFIG(COLLECT_TIMESTAMPS))
arg.timestamps[0].entry_stamp = timestamp_get();
size_t out_size = ulz4f(compressed_bootblock, _bootblock);
prog_segment_loaded((uintptr_t)_bootblock, out_size, SEG_FINAL);
- if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS))
+ if (CONFIG(COLLECT_TIMESTAMPS))
arg.timestamps[1].entry_stamp = timestamp_get();
prog_run(&prog_bootblock);
diff --git a/src/lib/edid.c b/src/lib/edid.c
index 26a7b52735..553b0a2d7e 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -525,7 +525,7 @@ detailed_block(struct edid *result_edid, unsigned char *x, int in_extension,
* another call to edid_set_framebuffer_bits_per_pixel(). As a cheap
* heuristic, assume that X86 systems require a 64-byte row alignment
* (since that seems to be true for most Intel chipsets). */
- if (IS_ENABLED(CONFIG_ARCH_X86))
+ if (CONFIG(ARCH_X86))
edid_set_framebuffer_bits_per_pixel(out, 32, 64);
else
edid_set_framebuffer_bits_per_pixel(out, 32, 0);
diff --git a/src/lib/fallback_boot.c b/src/lib/fallback_boot.c
index e4a128e291..d3d0eb0d21 100644
--- a/src/lib/fallback_boot.c
+++ b/src/lib/fallback_boot.c
@@ -6,8 +6,8 @@ void __weak set_boot_successful(void) { }
void boot_successful(void)
{
- if (IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE) &&
- IS_ENABLED(CONFIG_VGA_TEXT_FRAMEBUFFER)) {
+ if (CONFIG(FRAMEBUFFER_SET_VESA_MODE) &&
+ CONFIG(VGA_TEXT_FRAMEBUFFER)) {
void vbe_textmode_console(void);
vbe_textmode_console();
diff --git a/src/lib/gcov-glue.c b/src/lib/gcov-glue.c
index 7edc90a221..abeafa5546 100644
--- a/src/lib/gcov-glue.c
+++ b/src/lib/gcov-glue.c
@@ -41,7 +41,7 @@ static FILE *previous_file = NULL;
static FILE *fopen(const char *path, const char *mode)
{
-#if IS_ENABLED(CONFIG_DEBUG_COVERAGE)
+#if CONFIG(DEBUG_COVERAGE)
printk(BIOS_DEBUG, "fopen %s with mode %s\n",
path, mode);
#endif
@@ -74,7 +74,7 @@ static FILE *fopen(const char *path, const char *mode)
static int fclose(FILE *stream)
{
-#if IS_ENABLED(CONFIG_DEBUG_COVERAGE)
+#if CONFIG(DEBUG_COVERAGE)
printk(BIOS_DEBUG, "fclose %s\n", stream->filename);
#endif
return 0;
@@ -85,7 +85,7 @@ static int fseek(FILE *stream, long offset, int whence)
/* fseek should only be called with offset==0 and whence==SEEK_SET
* to a freshly opened file. */
gcc_assert(offset == 0 && whence == SEEK_SET);
-#if IS_ENABLED(CONFIG_DEBUG_COVERAGE)
+#if CONFIG(DEBUG_COVERAGE)
printk(BIOS_DEBUG, "fseek %s offset=%ld whence=%d\n",
stream->filename, offset, whence);
#endif
@@ -96,7 +96,7 @@ static long ftell(FILE *stream)
{
/* ftell should currently not be called */
gcc_assert(0);
-#if IS_ENABLED(CONFIG_DEBUG_COVERAGE)
+#if CONFIG(DEBUG_COVERAGE)
printk(BIOS_DEBUG, "ftell %s\n", stream->filename);
#endif
return 0;
@@ -104,7 +104,7 @@ static long ftell(FILE *stream)
static size_t fread(void *ptr, size_t size, size_t nmemb, FILE *stream)
{
-#if IS_ENABLED(CONFIG_DEBUG_COVERAGE)
+#if CONFIG(DEBUG_COVERAGE)
printk(BIOS_DEBUG, "fread: ptr=%p size=%zd nmemb=%zd FILE*=%p\n",
ptr, size, nmemb, stream);
#endif
@@ -113,7 +113,7 @@ static size_t fread(void *ptr, size_t size, size_t nmemb, FILE *stream)
static size_t fwrite(const void *ptr, size_t size, size_t nmemb, FILE *stream)
{
-#if IS_ENABLED(CONFIG_DEBUG_COVERAGE)
+#if CONFIG(DEBUG_COVERAGE)
printk(BIOS_DEBUG, "fwrite: %zd * %zd bytes to file %s\n",
nmemb, size, stream->filename);
#endif
@@ -145,7 +145,7 @@ static void coverage_init(void *unused)
void __gcov_flush(void);
static void coverage_exit(void *unused)
{
-#if IS_ENABLED(CONFIG_DEBUG_COVERAGE)
+#if CONFIG(DEBUG_COVERAGE)
printk(BIOS_DEBUG, "Syncing coverage data.\n");
#endif
__gcov_flush();
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c
index 98b88418ab..493ff2dcde 100644
--- a/src/lib/hardwaremain.c
+++ b/src/lib/hardwaremain.c
@@ -32,7 +32,7 @@
#include <reset.h>
#include <boot/tables.h>
#include <program_loading.h>
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
#include <arch/acpi.h>
#endif
#include <timer.h>
@@ -81,7 +81,7 @@ struct boot_state {
boot_state_t (*run_state)(void *arg);
void *arg;
int complete : 1;
-#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER)
+#if CONFIG(HAVE_MONOTONIC_TIMER)
struct boot_state_times times;
#endif
};
@@ -179,7 +179,7 @@ static boot_state_t bs_post_device(void *arg)
static boot_state_t bs_os_resume_check(void *arg)
{
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
void *wake_vector;
wake_vector = acpi_find_wakeup_vector();
@@ -198,7 +198,7 @@ static boot_state_t bs_os_resume_check(void *arg)
static boot_state_t bs_os_resume(void *wake_vector)
{
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
arch_bootstate_coreboot_exit();
acpi_resume(wake_vector);
#endif
@@ -238,7 +238,7 @@ static boot_state_t bs_payload_boot(void *arg)
return BS_PAYLOAD_BOOT;
}
-#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER)
+#if CONFIG(HAVE_MONOTONIC_TIMER)
static void bs_sample_time(struct boot_state *state)
{
struct mono_time *mt;
@@ -267,7 +267,7 @@ static inline void bs_sample_time(struct boot_state *state) {}
static inline void bs_report_time(struct boot_state *state) {}
#endif
-#if IS_ENABLED(CONFIG_TIMER_QUEUE)
+#if CONFIG(TIMER_QUEUE)
static void bs_run_timers(int drain)
{
/* Drain all timer callbacks until none are left, if directed.
@@ -295,7 +295,7 @@ static void bs_call_callbacks(struct boot_state *state,
phase->callbacks = bscb->next;
bscb->next = NULL;
-#if IS_ENABLED(CONFIG_DEBUG_BOOT_STATE)
+#if CONFIG(DEBUG_BOOT_STATE)
printk(BIOS_DEBUG, "BS: callback (%p) @ %s.\n",
bscb, bscb->location);
#endif
@@ -339,7 +339,7 @@ static void bs_walk_state_machine(void)
break;
}
- if (IS_ENABLED(CONFIG_DEBUG_BOOT_STATE))
+ if (CONFIG(DEBUG_BOOT_STATE))
printk(BIOS_DEBUG, "BS: Entering %s state.\n",
state->name);
@@ -359,7 +359,7 @@ static void bs_walk_state_machine(void)
next_id = state->run_state(state->arg);
- if (IS_ENABLED(CONFIG_DEBUG_BOOT_STATE))
+ if (CONFIG(DEBUG_BOOT_STATE))
printk(BIOS_DEBUG, "BS: Exiting %s state.\n",
state->name);
@@ -367,7 +367,7 @@ static void bs_walk_state_machine(void)
bs_call_callbacks(state, current_phase.seq);
- if (IS_ENABLED(CONFIG_DEBUG_BOOT_STATE))
+ if (CONFIG(DEBUG_BOOT_STATE))
printk(BIOS_DEBUG,
"----------------------------------------\n");
@@ -448,7 +448,7 @@ void main(void)
/* TODO: Understand why this is here and move to arch/platform code. */
/* For MMIO UART this needs to be called before any other printk. */
- if (IS_ENABLED(CONFIG_ARCH_X86))
+ if (CONFIG(ARCH_X86))
init_timer();
/* console_init() MUST PRECEDE ALL printk()! Additionally, ensure
@@ -470,7 +470,7 @@ void main(void)
post_code(POST_ENTRY_RAMSTAGE);
/* Handoff sleep type from romstage. */
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
acpi_is_wakeup();
#endif
diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c
index ff1cb95094..a50d349a87 100644
--- a/src/lib/imd_cbmem.c
+++ b/src/lib/imd_cbmem.c
@@ -40,8 +40,8 @@
* NULL from cbmem_top() before that point.
*/
#define CAN_USE_GLOBALS \
- (!IS_ENABLED(CONFIG_ARCH_X86) || ENV_RAMSTAGE || ENV_POSTCAR || \
- IS_ENABLED(CONFIG_NO_CAR_GLOBAL_MIGRATION))
+ (!CONFIG(ARCH_X86) || ENV_RAMSTAGE || ENV_POSTCAR || \
+ CONFIG(NO_CAR_GLOBAL_MIGRATION))
static inline struct imd *cbmem_get_imd(void)
{
@@ -303,7 +303,7 @@ void cbmem_get_region(void **baseptr, size_t *size)
imd_region_used(cbmem_get_imd(), baseptr, size);
}
-#if ENV_RAMSTAGE || (IS_ENABLED(CONFIG_EARLY_CBMEM_LIST) \
+#if ENV_RAMSTAGE || (CONFIG(EARLY_CBMEM_LIST) \
&& (ENV_POSTCAR || ENV_ROMSTAGE))
/*
* -fdata-sections doesn't work so well on read only strings. They all
diff --git a/src/lib/libgcc.c b/src/lib/libgcc.c
index 88b3f9be01..b8bcd1c412 100644
--- a/src/lib/libgcc.c
+++ b/src/lib/libgcc.c
@@ -20,8 +20,8 @@
* <lib.h> in case GCC does not have an assembly version for this arch.
*/
-#if !IS_ENABLED(CONFIG_ARCH_X86) /* work around lack of --gc-sections on x86 */ \
- && !IS_ENABLED(CONFIG_ARCH_RISCV_RV32) /* defined in rv32 libgcc.a */
+#if !CONFIG(ARCH_X86) /* work around lack of --gc-sections on x86 */ \
+ && !CONFIG(ARCH_RISCV_RV32) /* defined in rv32 libgcc.a */
int __clzsi2(u32 a);
int __clzsi2(u32 a)
{
diff --git a/src/lib/malloc.c b/src/lib/malloc.c
index b881ed2747..aa266b44dc 100644
--- a/src/lib/malloc.c
+++ b/src/lib/malloc.c
@@ -2,7 +2,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
-#if IS_ENABLED(CONFIG_DEBUG_MALLOC)
+#if CONFIG(DEBUG_MALLOC)
#define MALLOCDBG(x...) printk(BIOS_SPEW, x)
#else
#define MALLOCDBG(x...)
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 7319811fcd..3b77712550 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -68,7 +68,7 @@ void run_romstage(void)
prog_run(&romstage);
fail:
- if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE))
+ if (CONFIG(BOOTBLOCK_CONSOLE))
die("Couldn't load romstage.\n");
halt();
}
@@ -81,7 +81,7 @@ void __weak stage_cache_load_stage(int stage_id,
static void ramstage_cache_invalid(void)
{
printk(BIOS_ERR, "ramstage cache invalid.\n");
- if (IS_ENABLED(CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE)) {
+ if (CONFIG(RESET_ON_INVALID_RAMSTAGE_CACHE)) {
board_reset();
}
}
@@ -113,7 +113,7 @@ static int load_relocatable_ramstage(struct prog *ramstage)
static int load_nonrelocatable_ramstage(struct prog *ramstage)
{
- if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+ if (CONFIG(HAVE_ACPI_RESUME)) {
uintptr_t base = 0;
size_t size = cbfs_prog_stage_section(ramstage, &base);
if (size)
@@ -139,8 +139,8 @@ void run_ramstage(void)
* Only x86 systems using ramstage stage cache currently take the same
* firmware path on resume.
*/
- if (IS_ENABLED(CONFIG_ARCH_X86) &&
- !IS_ENABLED(CONFIG_NO_STAGE_CACHE))
+ if (CONFIG(ARCH_X86) &&
+ !CONFIG(NO_STAGE_CACHE))
run_ramstage_from_resume(&ramstage);
if (prog_locate(&ramstage))
@@ -148,13 +148,13 @@ void run_ramstage(void)
timestamp_add_now(TS_START_COPYRAM);
- if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) {
+ if (CONFIG(RELOCATABLE_RAMSTAGE)) {
if (load_relocatable_ramstage(&ramstage))
goto fail;
} else if (load_nonrelocatable_ramstage(&ramstage))
goto fail;
- if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE))
+ if (!CONFIG(NO_STAGE_CACHE))
stage_cache_add(STAGE_RAMSTAGE, &ramstage);
timestamp_add_now(TS_END_COPYRAM);
@@ -190,7 +190,7 @@ void payload_load(void)
selfload_check(payload, BM_MEM_RAM);
break;
case CBFS_TYPE_FIT: /* Flattened image tree */
- if (IS_ENABLED(CONFIG_PAYLOAD_FIT_SUPPORT)) {
+ if (CONFIG(PAYLOAD_FIT_SUPPORT)) {
fit_payload(payload);
break;
} /* else fall-through */
diff --git a/src/lib/program.ld b/src/lib/program.ld
index 156b86255c..851aa75d67 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -35,9 +35,9 @@
*(.text._start);
*(.text.stage_entry);
#if (ENV_DECOMPRESSOR || ENV_BOOTBLOCK && \
- !IS_ENABLED(CONFIG_COMPRESS_BOOTBLOCK)) && \
- !(IS_ENABLED(CONFIG_ARCH_BOOTBLOCK_X86_32) || \
- IS_ENABLED(CONFIG_ARCH_BOOTBLOCK_X86_64))
+ !CONFIG(COMPRESS_BOOTBLOCK)) && \
+ !(CONFIG(ARCH_BOOTBLOCK_X86_32) || \
+ CONFIG(ARCH_BOOTBLOCK_X86_64))
KEEP(*(.id));
#endif
*(.text);
@@ -73,7 +73,7 @@
_etext = .;
} : to_load
-#if ENV_RAMSTAGE && IS_ENABLED(CONFIG_COVERAGE)
+#if ENV_RAMSTAGE && CONFIG(COVERAGE)
.ctors . : {
. = ALIGN(0x100);
__CTOR_LIST__ = .;
diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
index 461a028b11..f0f5c556a6 100644
--- a/src/lib/ramtest.c
+++ b/src/lib/ramtest.c
@@ -6,7 +6,7 @@ static void write_phys(unsigned long addr, u32 value)
{
// Assembler in lib/ is very ugly. But we properly guarded
// it so let's obey this one for now
-#if IS_ENABLED(CONFIG_SSE2)
+#if CONFIG(SSE2)
asm volatile(
"movnti %1, (%0)"
: /* outputs */
@@ -31,7 +31,7 @@ static u32 read_phys(unsigned long addr)
static void phys_memory_barrier(void)
{
-#if IS_ENABLED(CONFIG_SSE2)
+#if CONFIG(SSE2)
// Needed for movnti
asm volatile (
"sfence"
diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c
index 6234af67d5..50cf7b6d08 100644
--- a/src/lib/reg_script.c
+++ b/src/lib/reg_script.c
@@ -24,12 +24,12 @@
#include <stdint.h>
#include <reg_script.h>
-#if IS_ENABLED(CONFIG_ARCH_X86)
+#if CONFIG(ARCH_X86)
#include <cpu/x86/msr.h>
#endif
-#define HAS_IOSF (IS_ENABLED(CONFIG_SOC_INTEL_BAYTRAIL) || \
- IS_ENABLED(CONFIG_SOC_INTEL_FSP_BAYTRAIL))
+#define HAS_IOSF (CONFIG(SOC_INTEL_BAYTRAIL) || \
+ CONFIG(SOC_INTEL_FSP_BAYTRAIL))
#if HAS_IOSF
#include <soc/iosf.h> /* TODO: wrap in <soc/reg_script.h, remove #ifdef? */
@@ -376,7 +376,7 @@ static void reg_script_write_iosf(struct reg_script_context *ctx)
static uint64_t reg_script_read_msr(struct reg_script_context *ctx)
{
-#if IS_ENABLED(CONFIG_ARCH_X86)
+#if CONFIG(ARCH_X86)
const struct reg_script *step = reg_script_get_step(ctx);
msr_t msr = rdmsr(step->reg);
uint64_t value = msr.hi;
@@ -388,7 +388,7 @@ static uint64_t reg_script_read_msr(struct reg_script_context *ctx)
static void reg_script_write_msr(struct reg_script_context *ctx)
{
-#if IS_ENABLED(CONFIG_ARCH_X86)
+#if CONFIG(ARCH_X86)
const struct reg_script *step = reg_script_get_step(ctx);
msr_t msr;
msr.hi = step->value >> 32;
diff --git a/src/lib/reset.c b/src/lib/reset.c
index 904776e91b..61163f13a3 100644
--- a/src/lib/reset.c
+++ b/src/lib/reset.c
@@ -26,7 +26,7 @@ __noreturn void board_reset(void)
halt();
}
-#if IS_ENABLED(CONFIG_MISSING_BOARD_RESET)
+#if CONFIG(MISSING_BOARD_RESET)
void do_board_reset(void)
{
printk(BIOS_CRIT, "No board_reset implementation, hanging...\n");
diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c
index 79bda1ef77..b378d6377e 100644
--- a/src/lib/spd_bin.c
+++ b/src/lib/spd_bin.c
@@ -130,11 +130,11 @@ static void smbus_read_spd(u8 *spd, u8 addr)
u16 i;
u8 step = 1;
- if (IS_ENABLED(CONFIG_SPD_READ_BY_WORD))
+ if (CONFIG(SPD_READ_BY_WORD))
step = sizeof(uint16_t);
for (i = 0; i < SPD_PAGE_LEN; i += step) {
- if (IS_ENABLED(CONFIG_SPD_READ_BY_WORD))
+ if (CONFIG(SPD_READ_BY_WORD))
((u16*)spd)[i / sizeof(uint16_t)] =
smbus_read_word(0, addr, i);
else
diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c
index d2012d4059..b6330fa258 100644
--- a/src/lib/timestamp.c
+++ b/src/lib/timestamp.c
@@ -114,7 +114,7 @@ static struct timestamp_table *timestamp_alloc_cbmem_table(void)
static int timestamp_should_run(void)
{
/* Only check boot_cpu() in other stages than ramstage on x86. */
- if ((!ENV_RAMSTAGE && IS_ENABLED(CONFIG_ARCH_X86)) && !boot_cpu())
+ if ((!ENV_RAMSTAGE && CONFIG(ARCH_X86)) && !boot_cpu())
return 0;
return 1;
@@ -173,7 +173,7 @@ static void timestamp_add_table_entry(struct timestamp_table *ts_table,
tse->entry_id = id;
tse->entry_stamp = ts_time - ts_table->base_time;
- if (IS_ENABLED(CONFIG_TIMESTAMPS_ON_CONSOLE))
+ if (CONFIG(TIMESTAMPS_ON_CONSOLE))
printk(BIOS_SPEW, "Timestamp - %s: %" PRIu64 "\n",
timestamp_name(id), ts_time);
@@ -250,7 +250,7 @@ static void timestamp_sync_cache_to_cbmem(int is_recovery)
/* cbmem is being recovered. */
if (is_recovery) {
/* x86 resume path expects timestamps to be reset. */
- if (IS_ENABLED(CONFIG_ARCH_ROMSTAGE_X86_32) && ENV_ROMSTAGE)
+ if (CONFIG(ARCH_ROMSTAGE_X86_32) && ENV_ROMSTAGE)
ts_cbmem_table = timestamp_alloc_cbmem_table();
else {
/* Find existing table in cbmem. */
@@ -357,7 +357,7 @@ uint64_t __weak timestamp_get(void)
{
struct mono_time t1, t2;
- if (!IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER))
+ if (!CONFIG(HAVE_MONOTONIC_TIMER))
return 0;
mono_time_set_usecs(&t1, 0);