arch/x86: introduce postcar stage/phase

Certain chipsets don't have a memory-mapped boot media
so their code execution for stages prior to DRAM initialization
is backed by SRAM or cache-as-ram. The postcar stage/phase
handles the cache-as-ram situation where in order to tear down
cache-as-ram one needs to be executing out of a backing
store that isn't transient. By current definition, cache-as-ram
is volatile and tearing it down leads to its contents disappearing.
Therefore provide a shim layer, postcar, that's loaded into
memory and executed which does 2 things:

1. Tears down cache-as-ram with a chipset helper function.
2. Loads and runs ramstage.

Because those 2 things are executed out of ram there's no issue
of the code's backing store while executing the code that
tears down cache-as-ram. The current implementation makes no
assumption regarding cacheability of the DRAM itself. If the
chipset code wishes to cache DRAM for loading of the postcar
stage/phase then it's also up to the chipset to handle any
coherency issues pertaining to cache-as-ram destruction.

Change-Id: Ia58efdadd0b48f20cfe7de2f49ab462306c3a19b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14140
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>

2 files changed, 33 insertions, 3 deletions

diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 646fefab5f..3352a3027f 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -131,13 +131,16 @@ ramstage-$(CONFIG_ACPI_NHLT) += nhlt.c
 
 romstage-y += cbmem_common.c
 romstage-y += imd_cbmem.c
+romstage-y += imd.c
 
 ramstage-y += cbmem_common.c
 ramstage-y += imd_cbmem.c
-
-romstage-y += imd.c
 ramstage-y += imd.c
 
+postcar-y += cbmem_common.c
+postcar-y += imd_cbmem.c
+postcar-y += imd.c
+
 bootblock-y += hexdump.c
 ramstage-y += hexdump.c
 romstage-y += hexdump.c
@@ -167,12 +170,14 @@ romstage-y += version.c
 ramstage-y += version.c
 smm-y += version.c
 verstage-y += version.c
+postcar-y += version.c
 
 $(call src-to-obj,bootblock,$(dir)/version.c) : $(obj)/build.h
 $(call src-to-obj,romstage,$(dir)/version.c) : $(obj)/build.h
 $(call src-to-obj,ramstage,$(dir)/version.c) : $(obj)/build.h
 $(call src-to-obj,smm,$(dir)/version.c) : $(obj)/build.h
 $(call src-to-obj,verstage,$(dir)/version.c) : $(obj)/build.h
+$(call src-to-obj,postcar,$(dir)/version.c) : $(obj)/build.h
 
 romstage-y += bootmode.c
 ramstage-y += bootmode.c
@@ -183,9 +188,27 @@ romstage-y += halt.c
 ramstage-y += halt.c
 smm-y += halt.c
 
+postcar-y += bootmode.c
+postcar-y += boot_device.c
+postcar-y += cbfs.c
+postcar-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
+postcar-y += delay.c
+postcar-y += fmap.c
+postcar-y += gcc.c
+postcar-y += halt.c
+postcar-y += libgcc.c
+postcar-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c lzmadecode.c
+postcar-y += memchr.c
+postcar-y += memcmp.c
+postcar-y += prog_loaders.c
+postcar-y += prog_ops.c
+postcar-y += rmodule.c
+postcar-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
+
 # Use program.ld for all the platforms which use C fo the bootblock.
 bootblock-$(CONFIG_C_ENVIRONMENT_BOOTBLOCK) += program.ld
 
+postcar-y += program.ld
 romstage-y += program.ld
 ramstage-y += program.ld
 verstage-y += program.ld
diff --git a/src/lib/program.ld b/src/lib/program.ld
index 9b8c7c9ec1..99afe5dd56 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -80,7 +80,14 @@
 	. = ALIGN(ARCH_CACHELINE_ALIGN_SIZE);
 	_data = .;
 
-#if ENV_RMODULE
+/*
+ * The postcar phase uses a stack value that is located in the relocatable
+ * module section. While the postcar stage could be linked like smm and
+ * other rmodules the postcar stage needs similar semantics of the more
+ * traditional stages in the coreboot infrastructure. Therefore it's easier
+ * to specialize this case.
+ */
+#if ENV_RMODULE || ENV_POSTCAR
 	_rmodule_params = .;
 	KEEP(*(.module_parameters));
 	_ermodule_params = .;