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| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-07-28 16:03:07 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-23 17:20:13 +0100 |
| commit | b0c302fd79c19d6a01af64fc798bc7be1c1bb59c (patch) | |
| tree | 18ce84e378627f7e60f49b530e0d773738652ef1 /src/lib | |
| parent | d36ef6a51df0d9bb840f091adee8b7bf3424b331 (diff) | |
| download | coreboot-b0c302fd79c19d6a01af64fc798bc7be1c1bb59c.tar.xz | |
Publish the board ID value in coreboot table, when configured
Board ID value is usually of interest to bootloaders. Instead of
duplicating the board ID discovery code in different bootloaders let's
determine it in coreboot and publish it through coreboot table, when
configured.
BUG=chrome-os-partner:30489
TEST=none yet
Change-Id: Ia1e36b907ac15b0aafce0711f827cb83622e27bb
Original-Change-Id: Iee247c44a1c91dbcedcc9058e8742c75ff951f43
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210116
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit b2057a02db9391e2085b138eea843e6bb09d3ea2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/8719
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/lib')
| -rw-r--r-- | src/lib/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/lib/coreboot_table.c | 18 |
2 files changed, 19 insertions, 1 deletions
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 1e70e2e01a..472bd8d8cc 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -57,7 +57,6 @@ ifeq ($(CONFIG_COMPILER_GCC),y) romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += gcc.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c endif -romstage-$(CONFIG_TERTIARY_BOARD_ID) += tristate_gpios.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c @@ -85,6 +84,7 @@ ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += edid.c ramstage-y += memrange.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c +ramstage-$(CONFIG_TERTIARY_BOARD_ID) += tristate_gpios.c romstage-y += cbmem_common.c dynamic_cbmem.c ramstage-y += cbmem_common.c dynamic_cbmem.c diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index abcb0eda11..2b484d4b64 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -26,6 +26,7 @@ #include <boot/coreboot_tables.h> #include <string.h> #include <version.h> +#include <boardid.h> #include <device/device.h> #include <stdlib.h> #include <cbfs.h> @@ -212,6 +213,19 @@ static inline void lb_vboot_handoff(struct lb_header *header) {} #endif /* CONFIG_VBOOT_VERIFY_FIRMWARE */ #endif /* CONFIG_CHROMEOS */ +static void lb_board_id(struct lb_header *header) +{ +#if CONFIG_BOARD_ID_SUPPORT + struct lb_board_id *bid; + + bid = (struct lb_board_id *)lb_new_record(header); + + bid->tag = LB_TAG_BOARD_ID; + bid->size = sizeof(*bid); + bid->board_id = board_id(); +#endif +} + static void add_cbmem_pointers(struct lb_header *header) { /* @@ -432,6 +446,10 @@ unsigned long write_coreboot_table( /* pass along the vboot_handoff address. */ lb_vboot_handoff(head); #endif + + /* Add board ID if available */ + lb_board_id(head); + add_cbmem_pointers(head); /* Add board-specific table entries, if any. */ |