New mechanism to define SRAM/memory map with automatic bounds checking

This patch creates a new mechanism to define the static memory layout
(primarily in SRAM) for a given board, superseding the brittle mass of
Kconfigs that we were using before. The core part is a memlayout.ld file
in the mainboard directory (although boards are expected to just include
the SoC default in most cases), which is the primary linker script for
all stages (though not rmodules for now). It uses preprocessor macros
from <memlayout.h> to form a different valid linker script for all
stages while looking like a declarative, boilerplate-free map of memory
addresses to the programmer. Linker asserts will automatically guarantee
that the defined regions cannot overlap. Stages are defined with a
maximum size that will be enforced by the linker. The file serves to
both define and document the memory layout, so that the documentation
cannot go missing or out of date.

The mechanism is implemented for all boards in the ARM, ARM64 and MIPS
architectures, and should be extended onto all systems using SRAM in the
future. The CAR/XIP environment on x86 has very different requirements
and the layout is generally not as static, so it will stay like it is
and be unaffected by this patch (save for aligning some symbol names for
consistency and sharing the new common ramstage linker script include).

BUG=None
TEST=Booted normally and in recovery mode, checked suspend/resume and
the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and
Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies
with ToT and looked for red flags.

Change-Id: Ifd2276417f2036cbe9c056f17e42f051bcd20e81
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f1e2028e7ebceeb2d71ff366150a37564595e614
Original-Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/213370
Reviewed-on: http://review.coreboot.org/9283
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-by: Aaron Durbin <adurbin@google.com>

9 files changed, 254 insertions, 20 deletions

diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 7d02934e1e..f5b2afa5d7 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -39,7 +39,8 @@ romstage-y += prog_ops.c
 romstage-y += memchr.c
 romstage-y += memcmp.c
 $(foreach arch,$(ARCH_SUPPORTED),\
-	    $(eval rmodules_$(arch)-y += memcmp.c))
+	    $(eval rmodules_$(arch)-y += memcmp.c) \
+	    $(eval rmodules_$(arch)-y += rmodule.ld))
 
 romstage-$(CONFIG_I2C_TPM) += delay.c
 romstage-y += cbfs.c cbfs_core.c
@@ -122,12 +123,20 @@ ramstage-y += halt.c
 smm-y += halt.c
 secmon-y += halt.c
 
+ifneq ($(CONFIG_ARCH_X86),y)
+# X86 bootblock and romstage use custom ldscripts that are all glued together,
+# so we need to exclude it here or it would pick these up as well
+bootblock-y += bootblock.ld
+romstage-y += romstage.ld
+endif
+ramstage-y += ramstage.ld
+
 ifeq ($(CONFIG_RELOCATABLE_MODULES),y)
 ramstage-y += rmodule.c
 romstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += rmodule.c
 
 RMODULE_LDSCRIPT := $(src)/lib/rmodule.ld
-RMODULE_LDFLAGS  := -nostartfiles --gc-sections --emit-relocs -z defs -Bsymbolic -T$(RMODULE_LDSCRIPT)
+RMODULE_LDFLAGS  := -nostartfiles --gc-sections --emit-relocs -z defs -Bsymbolic -T $(RMODULE_LDSCRIPT)
 
 # rmodule_link_rules is a function that should be called with:
 # (1) the object name to link
@@ -137,8 +146,8 @@ RMODULE_LDFLAGS  := -nostartfiles --gc-sections --emit-relocs -z defs -Bsymbolic
 # It will create the necessary Make rules to create a rmodule. The resulting
 # rmdoule is named $(1).rmod
 define rmodule_link
-$(strip $(1)): $(strip $(2)) $$(RMODULE_LDSCRIPT) $$(RMODTOOL)
-	$$(LD_rmodules_$(4)) $$(RMODULE_LDFLAGS) --defsym=__heap_size=$(strip $(3)) -o $$@ --start-group $(strip $(2)) $$(COMPILER_RT_rmodules_$(4)) --end-group
+$(strip $(1)): $(strip $(2)) $$(COMPILER_RT_rmodules_$(4)) $(obj)/lib/rmodule.rmodules_$(4).ld | $$(RMODTOOL)
+	$$(LD_rmodules_$(4)) --gc-sections -static -T $(obj)/lib/rmodule.rmodules_$(4).ld --defsym=__heap_size=$(strip $(3)) -o $$@ --start-group $(filter-out %.ld,$(2)) --end-group
 	$$(NM_rmodules_$(4)) -n $$@ > $$(basename $$@).map
 
 $(strip $(1)).rmod: $(strip $(1))
diff --git a/src/lib/bootblock.ld b/src/lib/bootblock.ld
new file mode 100644
index 0000000000..9bd8a86aea
--- /dev/null
+++ b/src/lib/bootblock.ld
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* This file is included inside a SECTIONS block */
+
+.bootblock . : {
+	_program = .;
+	_bootblock = .;
+	*(.text._start);
+	*(.text.stage_entry);
+	KEEP(*(.id));
+	*(.text);
+	*(.text.*);
+	*(.rodata);
+	*(.rodata.*);
+	*(.data);
+	*(.data.*);
+	*(.bss);
+	*(.bss.*);
+	*(.sbss);
+	*(.sbss.*);
+	_ebootblock = .;
+	_eprogram = .;
+} : to_load = 0xff
+
+/DISCARD/ : {
+	*(.comment)
+	*(.note)
+	*(.comment.*)
+	*(.note.*)
+	*(.ARM.*)
+	*(.MIPS.*)
+}
diff --git a/src/lib/cbfs_spi.c b/src/lib/cbfs_spi.c
index 2b3728efaa..81e6ec3ce6 100644
--- a/src/lib/cbfs_spi.c
+++ b/src/lib/cbfs_spi.c
@@ -25,6 +25,7 @@
 
 #include <cbfs.h>
 #include <spi_flash.h>
+#include <symbols.h>
 
 /* SPI flash as CBFS media. */
 struct cbfs_spi_context {
@@ -80,8 +81,8 @@ static int init_cbfs_media_context(void)
 		if (!spi_context.spi_flash_info)
 			return -1;
 
-		spi_context.buffer.buffer = (void *)CONFIG_CBFS_CACHE_ADDRESS;
-		spi_context.buffer.size = CONFIG_CBFS_CACHE_SIZE;
+		spi_context.buffer.buffer = (void *)_cbfs_cache;
+		spi_context.buffer.size = _cbfs_cache_size;
 	}
 	return 0;
 
diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c
index 0c2722c04f..770c1d2c9b 100644
--- a/src/lib/cbmem_console.c
+++ b/src/lib/cbmem_console.c
@@ -21,6 +21,7 @@
 #include <console/cbmem_console.h>
 #include <cbmem.h>
 #include <arch/early_variables.h>
+#include <symbols.h>
 #include <string.h>
 
 /*
@@ -44,11 +45,9 @@ static void copy_console_buffer(struct cbmem_console *old_cons_p,
 /*
  * While running from ROM, before DRAM is initialized, some area in cache as
  * ram space is used for the console buffer storage. The size and location of
- * the area are defined in the config.
+ * the area are defined by the linker script with _(e)preram_cbmem_console.
  */
 
-extern struct cbmem_console preram_cbmem_console;
-
 #else
 
 /*
@@ -112,8 +111,8 @@ void cbmemc_init(void)
 		if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE))
 			flags = 0;
 
-	init_console_ptr(&preram_cbmem_console,
-			 CONFIG_CONSOLE_PRERAM_BUFFER_SIZE, flags);
+	init_console_ptr(_preram_cbmem_console,
+			_preram_cbmem_console_size, flags);
 #else
 	/*
 	 * Initializing before CBMEM is available, use static buffer to store
diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c
index 6c42a589d2..0e08d8829d 100644
--- a/src/lib/loaders/load_and_run_payload.c
+++ b/src/lib/loaders/load_and_run_payload.c
@@ -24,6 +24,7 @@
 #include <fallback.h>
 #include <lib.h>
 #include <program_loading.h>
+#include <symbols.h>
 #include <timestamp.h>
 
 extern const struct prog_loader_ops vboot_payload_loader;
diff --git a/src/lib/ramstage.ld b/src/lib/ramstage.ld
new file mode 100644
index 0000000000..f12653ec2e
--- /dev/null
+++ b/src/lib/ramstage.ld
@@ -0,0 +1,116 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* This file is included inside a SECTIONS block */
+
+/* First we place the code and read only data (typically const declared).
+ * This could theoretically be placed in rom.
+ */
+.text : {
+	_program = .;
+	_ramstage = .;
+	_text = .;
+	*(.text._start);
+	*(.text.stage_entry);
+	*(.text);
+	*(.text.*);
+	. = ALIGN(16);
+	_etext = .;
+} : to_load
+
+#ifdef CONFIG_COVERAGE
+.ctors : {
+	. = ALIGN(0x100);
+	__CTOR_LIST__ = .;
+	KEEP(*(.ctors));
+	LONG(0);
+	LONG(0);
+	__CTOR_END__ = .;
+}
+#endif
+
+/* TODO: align data sections to cache lines? (is that really useful?) */
+.rodata : {
+	_rodata = .;
+	. = ALIGN(8);
+
+	/* If any changes are made to the driver start/symbols or the
+	 * section names the equivalent changes need to made to
+	 * rmodule.ld. */
+	console_drivers = .;
+	KEEP(*(.rodata.console_drivers));
+	econsole_drivers = . ;
+	. = ALIGN(8);
+	pci_drivers = . ;
+	KEEP(*(.rodata.pci_driver));
+	epci_drivers = . ;
+	cpu_drivers = . ;
+	KEEP(*(.rodata.cpu_driver));
+	ecpu_drivers = . ;
+	_bs_init_begin = .;
+	KEEP(*(.bs_init));
+	LONG(0);
+	LONG(0);
+	_bs_init_end = .;
+
+	*(.rodata)
+	*(.rodata.*)
+	/* kevinh/Ispiri - Added an align, because the objcopy tool
+	 * incorrectly converts sections that are not long word aligned.
+	 */
+	 . = ALIGN(8);
+
+	_erodata = .;
+}
+
+.data : {
+	/* Move to different cache line to avoid false sharing with .rodata. */
+	. = ALIGN(64);	/* May not be actual line size, not that important. */
+	_data = .;
+	*(.data)
+	*(.data.*)
+	_edata = .;
+}
+
+.bss . : {
+	_bss = .;
+	*(.bss)
+	*(.bss.*)
+	*(.sbss)
+	*(.sbss.*)
+	_ebss = .;
+}
+
+.heap . : {
+	_heap = .;
+	/* Reserve CONFIG_HEAP_SIZE bytes for the heap */
+	. += CONFIG_HEAP_SIZE ;
+	. = ALIGN(4);
+	_eheap = .;
+	_eramstage = .;
+	_eprogram = .;
+}
+
+/* Discard the sections we don't need/want */
+
+/DISCARD/ : {
+	*(.comment)
+	*(.note)
+	*(.note.*)
+}
diff --git a/src/lib/rmodule.ld b/src/lib/rmodule.ld
index 065b5b642e..70a2d3df8e 100644
--- a/src/lib/rmodule.ld
+++ b/src/lib/rmodule.ld
@@ -22,18 +22,21 @@ SECTIONS
 
 	.payload :  {
 		/* C code of the module. */
-		_ram_seg = .;
-		*(.textfirst);
+		_program = .;
+		*(.text._start);
+		*(.text.stage_entry);
 		*(.text);
 		*(.text.*);
 		/* C read-only data. */
 		. = ALIGN(16);
 
+#ifdef CONFIG_COVERAGE
 		__CTOR_LIST__ = .;
 		*(.ctors);
 		LONG(0);
 		LONG(0);
 		__CTOR_END__ = .;
+#endif
 
 		/* The driver sections are to allow linking coreboot's
 		 * ramstage with the rmodule linker. Any changes made in
@@ -68,6 +71,7 @@ SECTIONS
 		. = ALIGN(8);
 
 		/* Data section. */
+		. = ALIGN(64);	/* Mirror cache line alignment from ramstage. */
 		_sdata = .;
 		*(.data);
 		*(.data.*);
@@ -95,7 +99,7 @@ SECTIONS
 		_heap = .;
 		. = . + __heap_size;
 		_eheap = .;
-		_eram_seg = .;
+		_eprogram = .;
 	}
 
 	/DISCARD/ : {
diff --git a/src/lib/romstage.ld b/src/lib/romstage.ld
new file mode 100644
index 0000000000..c3a2643787
--- /dev/null
+++ b/src/lib/romstage.ld
@@ -0,0 +1,58 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* This file is included inside a SECTIONS block */
+
+.text . : {
+	_program = .;
+	_romstage = .;
+	*(.text._start);
+	*(.text.stage_entry);
+	*(.text);
+	*(.text.*);
+} : to_load
+
+.data . : {
+	*(.rodata);
+	*(.rodata.*);
+	*(.data);
+	*(.data.*);
+	. = ALIGN(8);
+}
+
+.bss . : {
+	. = ALIGN(8);
+	_bss = .;
+	*(.bss)
+	*(.bss.*)
+	*(.sbss)
+	*(.sbss.*)
+	_ebss = .;
+	_eromstage = .;
+	_eprogram = .;
+}
+
+/* Discard the sections we don't need/want */
+/DISCARD/ : {
+	*(.comment)
+	*(.note)
+	*(.comment.*)
+	*(.note.*)
+	*(.eh_frame);
+}
diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c
index bd4c1690ac..d73b3f56af 100644
--- a/src/lib/selfboot.c
+++ b/src/lib/selfboot.c
@@ -24,17 +24,14 @@
 #include <stdint.h>
 #include <stdlib.h>
 #include <string.h>
+#include <symbols.h>
 #include <cbfs.h>
 #include <lib.h>
 #include <bootmem.h>
 #include <program_loading.h>
 
-/* from ramstage.ld: */
-extern unsigned char _ram_seg;
-extern unsigned char _eram_seg;
-
-static const unsigned long lb_start = (unsigned long)&_ram_seg;
-static const unsigned long lb_end = (unsigned long)&_eram_seg;
+static const unsigned long lb_start = (unsigned long)&_program;
+static const unsigned long lb_end = (unsigned long)&_eprogram;
 
 struct segment {
 	struct segment *next;