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authorJulius Werner <jwerner@chromium.org>2017-12-01 19:12:14 -0800
committerJulius Werner <jwerner@chromium.org>2017-12-07 01:19:32 +0000
commit96ed92d49dca18ca0d19de352831cf8df6f2e84c (patch)
tree28ddf5f6fee191542a88e1fadc9c8f3cb248dff5 /src/lib
parent4ec3d9d69efddf23de13ffa70c56cad478b219e8 (diff)
downloadcoreboot-96ed92d49dca18ca0d19de352831cf8df6f2e84c.tar.xz
boardid: Add helpers to read sku_id strapping into coreboot tables
On many recent Chrome OS boards, the desire to unite more configurations under the same image has led to the need of a "SKU ID" that identifies different configurations of the same board (e.g. with certain optional components stuffed or not stuffed, or replaced with a comparable component). This is markedly different from the existing "board ID", because that is reserved to count "revisions" -- changes made to the same configuration over time during the development process. This patch adds support to have a mainboard define this SKU ID and pass it through the coreboot table like we already have for board IDs. Change-Id: I8aabffe8e1003b0d6fb70d689ae513ca4b46aeda Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/22696 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/coreboot_table.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 18c70c9764..aeaff28313 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -246,6 +246,7 @@ static inline void lb_vboot_handoff(struct lb_header *header) {}
__attribute__((weak)) uint32_t board_id(void) { return UNDEFINED_STRAPPING_ID; }
__attribute__((weak)) uint32_t ram_code(void) { return UNDEFINED_STRAPPING_ID; }
+__attribute__((weak)) uint32_t sku_id(void) { return UNDEFINED_STRAPPING_ID; }
static void lb_board_id(struct lb_header *header)
{
@@ -310,6 +311,23 @@ static void lb_ram_code(struct lb_header *header)
printk(BIOS_INFO, "RAM code: %d\n", code);
}
+static void lb_sku_id(struct lb_header *header)
+{
+ struct lb_strapping_id *rec;
+ uint32_t sid = sku_id();
+
+ if (sid == UNDEFINED_STRAPPING_ID)
+ return;
+
+ rec = (struct lb_strapping_id *)lb_new_record(header);
+
+ rec->tag = LB_TAG_SKU_ID;
+ rec->size = sizeof(*rec);
+ rec->id_code = sid;
+
+ printk(BIOS_INFO, "SKU ID: %d\n", sid);
+}
+
static void add_cbmem_pointers(struct lb_header *header)
{
/*
@@ -544,11 +562,10 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
lb_vboot_handoff(head);
#endif
- /* Add board ID if available */
+ /* Add strapping IDs if available */
lb_board_id(head);
-
- /* Add RAM config if available */
lb_ram_code(head);
+ lb_sku_id(head);
/* Add SPI flash description if available */
if (IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))