summaryrefslogtreecommitdiff
path: root/src/lib
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-04 13:26:11 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-11 07:18:02 +0200
commitbc90e15d3f8e841ccf229fca5d7df99436ff4bdb (patch)
treebbbd4f2904b42d201d7e2fbccea5bfcbeeeed166 /src/lib
parentc04afd6433cd53acdc727ad760cde9c40090030b (diff)
downloadcoreboot-bc90e15d3f8e841ccf229fca5d7df99436ff4bdb.tar.xz
CBMEM: Backup top_of_ram instead of cbmem_toc
AMD northbridges have a complex way to resolve top_of_ram. Once it is resolved, it is stored in NVRAM to be used on resume. TODO: Redesign these get_top_of_ram() functions from scratch. Change-Id: I3cceb7e9b8b07620dacf138e99f98dc818c65341 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3557 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/cbmem.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c
index c5a11e3907..b6751defe4 100644
--- a/src/lib/cbmem.c
+++ b/src/lib/cbmem.c
@@ -45,12 +45,9 @@ struct cbmem_entry {
#ifndef __PRE_RAM__
uint64_t high_tables_base = 0;
uint64_t high_tables_size = 0;
+#endif
-void __attribute__((weak)) set_cbmem_toc(struct cbmem_entry * x)
-{
- /* do nothing, this should be called by chipset to save TOC in NVRAM */
-}
-
+#if !defined(__PRE_RAM__)
static void cbmem_trace_location(uint64_t base, uint64_t size, const char *s)
{
if (base && size && s) {
@@ -113,10 +110,6 @@ void cbmem_init(u64 baseaddr, u64 size)
for (;;) ;
}
- /* we don't need to call this in romstage, useful only from ramstage */
-#ifndef __PRE_RAM__
- set_cbmem_toc((struct cbmem_entry *)(unsigned long)baseaddr);
-#endif
memset(cbmem_toc, 0, CBMEM_TOC_RESERVED);
cbmem_toc[0] = (struct cbmem_entry) {