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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-01 20:29:14 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-08 04:50:33 +0000 |
| commit | 0a4457ff44b10f22b711f64e88888c757fbedf32 (patch) | |
| tree | 3e5511bb1e05dfdc34a28533782fb0230bc490a1 /src/lib | |
| parent | cccb815c5e4d908db9a668643eda241a740923f2 (diff) | |
| download | coreboot-0a4457ff44b10f22b711f64e88888c757fbedf32.tar.xz | |
lib/stage_cache: Refactor Kconfig options
Add explicit CBMEM_STAGE_CACHE option. Rename
CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM to TSEG_STAGE_CACHE.
Platforms with SMM_TSEG=y always need to implement
stage_cache_external_region(). It is allowed to return with a
region of size 0 to effectively disable the cache.
There are no provisions in Kconfig to degrade from
TSEG_STAGE_CACHE to CBMEM_STAGE_CACHE.
As a security measure CBMEM_STAGE_CACHE default is changed to
disabled. AGESA platforms without TSEG will experience slower
S3 resume speed unless they explicitly select the option.
Change-Id: Ibbdc701ea85b5a3208ca4e98c428b05b6d4e5340
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34664
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/lib')
| -rw-r--r-- | src/lib/Makefile.inc | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 9deb5bf377..e5678ffdf1 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -176,16 +176,13 @@ verstage-$(CONFIG_REG_SCRIPT) += reg_script.c romstage-$(CONFIG_REG_SCRIPT) += reg_script.c ramstage-$(CONFIG_REG_SCRIPT) += reg_script.c -ifeq ($(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM),y) -ramstage-y += ext_stage_cache.c -romstage-y += ext_stage_cache.c -postcar-y += ext_stage_cache.c -else -ramstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c -romstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c -postcar-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c -endif +ramstage-$(CONFIG_TSEG_STAGE_CACHE) += ext_stage_cache.c +romstage-$(CONFIG_TSEG_STAGE_CACHE) += ext_stage_cache.c +postcar-$(CONFIG_TSEG_STAGE_CACHE) += ext_stage_cache.c +ramstage-$(CONFIG_CBMEM_STAGE_CACHE) += cbmem_stage_cache.c +romstage-$(CONFIG_CBMEM_STAGE_CACHE) += cbmem_stage_cache.c +postcar-$(CONFIG_CBMEM_STAGE_CACHE) += cbmem_stage_cache.c romstage-y += boot_device.c ramstage-y += boot_device.c |