summaryrefslogtreecommitdiff
path: root/src/lib
diff options
context:
space:
mode:
authorBen Gardner <gardner.ben@gmail.com>2015-11-23 20:47:59 -0600
committerMartin Roth <martinroth@google.com>2015-11-24 21:21:43 +0100
commite597e63e49da740516732a2c8453bafdb7ac4fcd (patch)
tree8411e378b1622201b3545dad2387a02b7abd127e /src/lib
parentb9434aa853d75d38a5e051ca9a516621e9ca3605 (diff)
downloadcoreboot-e597e63e49da740516732a2c8453bafdb7ac4fcd.tar.xz
FSP 1.0: Fix CAR issues - broken timestamps and console
FSP 1.0 has a fixed-size temporary cache size and address and the entire cache is migrated in the FSP FspInitEntry() function. Previous code expected the symbol _car_data_start to be the same as CONFIG_DCACHE_RAM_BASE and _car_data_end to be the same as _preram_cbmem_console. FSP 1.0 is the only one that migrates _preram_cbmem_console. Others leave that where it is and extract the early console data in cbmemc_reinit(). Special handling is needed to handle that. Commit dd6fa93d broke both assumptions and so broke the timestamp table and console. The fix is to use CONFIG_DCACHE_RAM_BASE when calculating the offset and to use _preram_cbmem_console instead of _car_data_end for the console check. Change-Id: I6db109269b3537f7cb1300357c483ff2a745ffa7 Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-on: http://review.coreboot.org/12511 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/lib')
0 files changed, 0 insertions, 0 deletions