diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-02-06 15:47:31 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-19 20:31:41 +0100 |
| commit | f7c6d489ae28af611811515c1df96cfb10c79e9f (patch) | |
| tree | d87fd40fabe4e19139fff548caacd34da77a54a4 /src/lib | |
| parent | 991ce8fc74ff80cbe2c1c892e40aac0b209f35c4 (diff) | |
| download | coreboot-f7c6d489ae28af611811515c1df96cfb10c79e9f.tar.xz | |
rmodule: add ramstage support
Coreboot's ramstage defines certain sections/symbols in its fixed
static linker script. It uses these sections/symbols for locating the
drivers as well as its own program information. Add these sections
and symbols to the rmodule linker script so that ramstage can be
linked as an rmodule. These sections and symbols are a noop for other
rmodule-linked programs, but they are vital to the ramstage.
Also add a comment in coreboot_ram.ld to mirror any changes made there
to the rmodule linker script.
Change-Id: Ib9885a00e987aef0ee1ae34f1d73066e15bca9b1
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2786
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/lib')
| -rw-r--r-- | src/lib/rmodule.ld | 28 |
1 files changed, 25 insertions, 3 deletions
diff --git a/src/lib/rmodule.ld b/src/lib/rmodule.ld index fdee279697..c8bd297e51 100644 --- a/src/lib/rmodule.ld +++ b/src/lib/rmodule.ld @@ -41,6 +41,22 @@ SECTIONS *(.text.*); /* C read-only data. */ . = ALIGN(16); + + /* The driver sections are to allow linking coreboot's + * ramstage with the rmodule linker. Any changes made in + * coreboot_ram.ld should be made here as well. */ + console_drivers = .; + *(.rodata.console_drivers) + econsole_drivers = . ; + . = ALIGN(4); + pci_drivers = . ; + *(.rodata.pci_driver) + epci_drivers = . ; + cpu_drivers = . ; + *(.rodata.cpu_driver) + ecpu_drivers = . ; + . = ALIGN(4); + *(.rodata); *(.rodata.*); . = ALIGN(4); @@ -67,13 +83,13 @@ SECTIONS _payload_end_offset = LOADADDR(.data) + SIZEOF(.data); .bss (NOLOAD) : { - /* C uninitialized data of the SMM handler */ - _bss_begin = .; + /* C uninitialized data of the module. */ + _bss = .; *(.bss); *(.sbss); *(COMMON); . = ALIGN(8); - _bss_end = .; + _ebss = .; /* * Place the heap after BSS. The heap size is passed in by @@ -87,6 +103,12 @@ SECTIONS /* _module_program_size is the total memory used by the program. */ _module_program_size = _eheap - _module_link_start_addr; + /* coreboot's ramstage uses the _ram_seg and _eram_seg symbols + * for determining its load location. Provide those to help it out. + * It's a nop for any non-ramstage rmodule. */ + _ram_seg = _module_link_start_addr; + _eram_seg = _module_link_start_addr + _module_program_size; + /* The relocation information is linked on top of the BSS section * because the BSS section takes no space on disk. The relocation data * resides directly after the data section in the flat binary. */ |