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author | Mary Ruthven <mruthven@chromium.org> | 2015-11-13 14:05:27 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-12-03 14:17:04 +0100 |
commit | f82e8ab6970f0f18d81e3da61a96a955987f5362 (patch) | |
tree | 6e9567912ec15b0f31f8f6018fadf792827c6552 /src/lib | |
parent | 857829654c6e519a2165916d6596b5060b7b6aca (diff) | |
download | coreboot-f82e8ab6970f0f18d81e3da61a96a955987f5362.tar.xz |
cbfs_spi: enable CBFS access in early romstage
Currently the CBFS mmap cannot be accessed at the beginning of romstage
because it waits until DRAM is initialized. This change first loads CBFS
into SRAM and then switches to using DRAM as the backing once it is
initialized.
BUG=chromium:210230
BRANCH=none
TEST=confirm that the cbfs can be access at the beginning and end of
romstage on different boards.
Change-Id: I9fdaef392349c27ba1c19d4cd07e8ee0ac92dddc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ccaaba266386c7d5cc62de63bdca81a0cc7c4d83
Original-Change-Id: Idabfab99765b52069755e1d1aa61bbee39501796
Original-Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/312577
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12586
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/lib')
-rw-r--r-- | src/lib/cbfs_spi.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/lib/cbfs_spi.c b/src/lib/cbfs_spi.c index 31a2e79e6c..82c3b834d3 100644 --- a/src/lib/cbfs_spi.c +++ b/src/lib/cbfs_spi.c @@ -22,6 +22,7 @@ #include <boot_device.h> #include <spi_flash.h> #include <symbols.h> +#include <cbmem.h> static struct spi_flash *spi_flash_info; @@ -42,6 +43,12 @@ static const struct region_device_ops spi_ops = { static struct mmap_helper_region_device mdev = MMAP_HELPER_REGION_INIT(&spi_ops, 0, CONFIG_ROM_SIZE); +static void initialize_mdev(int unused) +{ + mmap_helper_device_init(&mdev, _dram_cbfs_cache, _dram_cbfs_cache_size); +} +ROMSTAGE_CBMEM_INIT_HOOK(initialize_mdev); + void boot_device_init(void) { int bus = CONFIG_BOOT_MEDIA_SPI_BUS; |