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| author | Angel Pons <th3fanbus@gmail.com> | 2020-12-11 16:55:04 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-12-14 10:25:02 +0000 |
| commit | 63a078e66d3ecb9a8e23c914b5ee6d9e89ef4cf3 (patch) | |
| tree | a925c04ac29a05aa87a0c83e3bf792c0d1f2ed27 /src/mainboard/51nb | |
| parent | 056c3a9ff25eab7daf57819ea2509a09cac52b62 (diff) | |
| download | coreboot-63a078e66d3ecb9a8e23c914b5ee6d9e89ef4cf3.tar.xz | |
soc/intel/skylake: Drop unreferenced PttSwitch dt setting
The value for this setting is not used anywhere. Drop it.
Change-Id: I75f6cdec6c69b374a07519bf9058b8f6e4916307
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/51nb')
| -rw-r--r-- | src/mainboard/51nb/x210/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index 49e2964f45..0e408f808e 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -47,7 +47,6 @@ chip soc/intel/skylake register "IoBufferOwnership" = "0" register "SsicPortEnable" = "0" register "ScsEmmcHs400Enabled" = "0" - register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "1" register "SaGv" = "SaGv_Enabled" |