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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-06-01 17:38:22 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-03 09:36:33 +0200
commit6fb379a1dbd60fcdd8ad30550b708ed1b9e3fa7d (patch)
tree45c4a83ab3a696f7c07cae245f37e9b87e8d8665 /src/mainboard/a-trend/atc-6220
parentaef5594f7409636cfbe2c7ebb23da041e36cd7f6 (diff)
downloadcoreboot-6fb379a1dbd60fcdd8ad30550b708ed1b9e3fa7d.tar.xz
mainboard: Remove #include early_serial.c from w83977tf boards
These non-ROMCC boards #include the model specific w83977tf Super I/O romstage component. The generic winbond_early_serial() function serves well here to further tighten integration into the new Super I/O framework and drop dependence on #include'ing .c files, leaving only ROMCC boards. Change-Id: Ib63c0f29f994c54e6112702506f288535799706c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5898 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/a-trend/atc-6220')
-rw-r--r--src/mainboard/a-trend/atc-6220/romstage.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/a-trend/atc-6220/romstage.c b/src/mainboard/a-trend/atc-6220/romstage.c
index 63d34b213d..22d3270f78 100644
--- a/src/mainboard/a-trend/atc-6220/romstage.c
+++ b/src/mainboard/a-trend/atc-6220/romstage.c
@@ -30,7 +30,9 @@
#include "drivers/pc80/udelay_io.c"
#include "lib/delay.c"
#include "cpu/x86/bist.h"
-#include "superio/winbond/w83977tf/early_serial.c"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83977tf/w83977tf.h>
+
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
@@ -42,7 +44,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
void main(unsigned long bist)
{
- w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
report_bist_failure(bist);