summaryrefslogtreecommitdiff
path: root/src/mainboard/abit
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2009-10-06 22:25:21 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2009-10-06 22:25:21 +0000
commit99950c2192c93cdb19a5c49be09f8cba63ccf383 (patch)
treee4e5f04a1c9882b7533b3c6db595699d09d53571 /src/mainboard/abit
parent0e9a92545d0be44487f9bc5ad6ab26af5badf125 (diff)
downloadcoreboot-99950c2192c93cdb19a5c49be09f8cba63ccf383.tar.xz
Use
select UDELAY_TSC select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 for all 440BX and i810 boards as per Options.lb. The UDELAY_IO / TSC / LAPIC / HPET setup will probably be checked and improved later when the kconfig transition is done. For now we keep the same values as in Options.lb. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4729 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/abit')
-rw-r--r--src/mainboard/abit/be6-ii_v2_0/Kconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/abit/be6-ii_v2_0/Kconfig b/src/mainboard/abit/be6-ii_v2_0/Kconfig
index d4ce4b91d6..d483d247be 100644
--- a/src/mainboard/abit/be6-ii_v2_0/Kconfig
+++ b/src/mainboard/abit/be6-ii_v2_0/Kconfig
@@ -26,7 +26,8 @@ config BOARD_ABIT_BE6_II_V2_0
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
- select UDELAY_IO
+ select UDELAY_TSC
+ select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
config MAINBOARD_DIR
string