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author | Martin Roth <martin.roth@se-eng.com> | 2014-12-29 22:08:15 -0700 |
---|---|---|
committer | Martin Roth <gaumless@gmail.com> | 2015-01-04 20:17:48 +0100 |
commit | 15b6325cd4127826460040dfe26c47f37ac3e8e7 (patch) | |
tree | adbdae0183a8da283ac9dba82ed36772b3e8b6a0 /src/mainboard/advansus/a785e-i | |
parent | 182e551f2d3556ca679237d914ba33bda2de1cbe (diff) | |
download | coreboot-15b6325cd4127826460040dfe26c47f37ac3e8e7.tar.xz |
AMD Mainboards - platform_cfg.h: Fixes for doxygen
- Move @def BIOS_SIZE description to the next line
- SB_GEN2 changed to SB_GPP_GEN2
- Move the SIO_HWM_BASE_ADDRESS description to the next line
Change-Id: Ia3496b0108484f557627304553461932a100dfa5
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8071
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/advansus/a785e-i')
-rw-r--r-- | src/mainboard/advansus/a785e-i/platform_cfg.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mainboard/advansus/a785e-i/platform_cfg.h b/src/mainboard/advansus/a785e-i/platform_cfg.h index 6944ab2b6d..29f92d283f 100644 --- a/src/mainboard/advansus/a785e-i/platform_cfg.h +++ b/src/mainboard/advansus/a785e-i/platform_cfg.h @@ -22,7 +22,8 @@ #define _PLATFORM_CFG_H_ /** - * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M + * @def BIOS_SIZE + * BIOS_SIZE_{1,2,4,8,16}M * * In SB800, default ROM size is 1M Bytes, if your platform ROM * bigger than 1M you have to set the ROM size outside CIMx module and @@ -191,7 +192,7 @@ #define NB_SB_GEN2 TRUE /** - * @def SB_GEN2 + * @def SB_GPP_GEN2 * 0 - Disable * 1 - Enable */ @@ -212,7 +213,8 @@ #define GEC_CONFIG 0 /** - * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address + * @def SIO_HWM_BASE_ADDRESS + * Super IO HWM base address */ #define SIO_HWM_BASE_ADDRESS 0x290 |