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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-08-12 15:00:51 +0000
committerRonald G. Minnich <rminnich@gmail.com>2009-08-12 15:00:51 +0000
commit0588d19abef62dad63a7794a37bdd6a71c526d9e (patch)
tree1c507caa1ffed6ceb73d3e13fc9b766a713d16e2 /src/mainboard/advantech/pcm-5820
parent38cd29ebd7282333650cf11ed50c7f2fd4031e80 (diff)
downloadcoreboot-0588d19abef62dad63a7794a37bdd6a71c526d9e.tar.xz
Kconfig!
Works on Kontron, qemu, and serengeti. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> tested on abuild only. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/advantech/pcm-5820')
-rw-r--r--src/mainboard/advantech/pcm-5820/devicetree.cb56
1 files changed, 56 insertions, 0 deletions
diff --git a/src/mainboard/advantech/pcm-5820/devicetree.cb b/src/mainboard/advantech/pcm-5820/devicetree.cb
new file mode 100644
index 0000000000..b416e9afce
--- /dev/null
+++ b/src/mainboard/advantech/pcm-5820/devicetree.cb
@@ -0,0 +1,56 @@
+chip northbridge/amd/gx1 # Northbridge
+ device pci_domain 0 on # PCI domain
+ device pci 0.0 on end # Host bridge
+ chip southbridge/amd/cs5530 # Southbridge
+ device pci 12.0 on # ISA bridge
+ chip superio/winbond/w83977f # SUper I/O
+ device pnp 3f0.0 on # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 3f0.1 on # Parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 3f0.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 3f0.3 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 3f0.4 on # RTC / On-Now control
+ io 0x60 = 0x70
+ irq 0x70 = 8
+ end
+ device pnp 3f0.5 on # PS/2 keyboard / mouse
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1 # PS/2 keyboard interrupt
+ irq 0x72 = 12 # PS/2 mouse interrupt
+ end
+ device pnp 3f0.6 on # IR
+ # TODO?
+ end
+ device pnp 3f0.7 on # GPIO 1
+ # TODO?
+ end
+ device pnp 3f0.8 on # GPIO 2
+ # TODO?
+ end
+ end
+ end
+ device pci 12.1 on end # SMI
+ device pci 12.2 on end # IDE
+ device pci 12.3 on end # Audio (onboard)
+ device pci 12.4 on end # VGA
+ device pci 13.0 on end # USB
+ register "ide0_enable" = "1"
+ register "ide1_enable" = "1"
+ end
+ end
+ chip cpu/amd/model_gx1 # CPU
+ end
+end