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authorUwe Hermann <uwe@hermann-uwe.de>2009-10-06 22:25:21 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2009-10-06 22:25:21 +0000
commit99950c2192c93cdb19a5c49be09f8cba63ccf383 (patch)
treee4e5f04a1c9882b7533b3c6db595699d09d53571 /src/mainboard/advantech/pcm-5820
parent0e9a92545d0be44487f9bc5ad6ab26af5badf125 (diff)
downloadcoreboot-99950c2192c93cdb19a5c49be09f8cba63ccf383.tar.xz
Use
select UDELAY_TSC select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 for all 440BX and i810 boards as per Options.lb. The UDELAY_IO / TSC / LAPIC / HPET setup will probably be checked and improved later when the kconfig transition is done. For now we keep the same values as in Options.lb. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4729 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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