diff options
author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2014-10-18 10:21:14 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2014-12-16 21:17:36 +0100 |
commit | b59c5de056058899e5ea891d2fd65824a7df7887 (patch) | |
tree | 2692243976bcc1509d17bf96b4157c8d96fc7caf /src/mainboard/advantech | |
parent | 71b214553c952e790219864767ba7882c9aaae1f (diff) | |
download | coreboot-b59c5de056058899e5ea891d2fd65824a7df7887.tar.xz |
Drop GX1, CS5330 and related boards
There is no Cache As Ram for these boards, let's get rid of them.
Change-Id: Ib41f8cd64fc9a440838aea86076d6514aacb301c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7117
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/advantech')
-rw-r--r-- | src/mainboard/advantech/Kconfig | 35 | ||||
-rw-r--r-- | src/mainboard/advantech/pcm-5820/Kconfig | 45 | ||||
-rw-r--r-- | src/mainboard/advantech/pcm-5820/board_info.txt | 5 | ||||
-rw-r--r-- | src/mainboard/advantech/pcm-5820/devicetree.cb | 56 | ||||
-rw-r--r-- | src/mainboard/advantech/pcm-5820/irq_tables.c | 45 | ||||
-rw-r--r-- | src/mainboard/advantech/pcm-5820/romstage.c | 40 |
6 files changed, 0 insertions, 226 deletions
diff --git a/src/mainboard/advantech/Kconfig b/src/mainboard/advantech/Kconfig deleted file mode 100644 index ab46f96287..0000000000 --- a/src/mainboard/advantech/Kconfig +++ /dev/null @@ -1,35 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if VENDOR_ADVANTECH - -choice - prompt "Mainboard model" - -config BOARD_ADVANTECH_PCM_5820 - bool "PCM-5820" - -endchoice - -source "src/mainboard/advantech/pcm-5820/Kconfig" - -config MAINBOARD_VENDOR - string - default "Advantech" - -endif # VENDOR_ADVANTECH diff --git a/src/mainboard/advantech/pcm-5820/Kconfig b/src/mainboard/advantech/pcm-5820/Kconfig deleted file mode 100644 index 86bcd7ac17..0000000000 --- a/src/mainboard/advantech/pcm-5820/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de> -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if BOARD_ADVANTECH_PCM_5820 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX1 - select NORTHBRIDGE_AMD_GX1 - select SOUTHBRIDGE_AMD_CS5530 - select SUPERIO_WINBOND_W83977F - select ROMCC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select UDELAY_TSC - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default advantech/pcm-5820 - -config MAINBOARD_PART_NUMBER - string - default "PCM-5820" - -config IRQ_SLOT_COUNT - int - default 2 - -endif # BOARD_ADVANTECH_PCM_5820 diff --git a/src/mainboard/advantech/pcm-5820/board_info.txt b/src/mainboard/advantech/pcm-5820/board_info.txt deleted file mode 100644 index 84b3c8da4d..0000000000 --- a/src/mainboard/advantech/pcm-5820/board_info.txt +++ /dev/null @@ -1,5 +0,0 @@ -Category: half -Board URL: http://taiwan.advantech.com.tw/products/Model_Detail.asp?model_id=1-1TGZL8 -ROM package: PLCC32 -ROM socketed: y -Flashrom support: y diff --git a/src/mainboard/advantech/pcm-5820/devicetree.cb b/src/mainboard/advantech/pcm-5820/devicetree.cb deleted file mode 100644 index 8027ee20aa..0000000000 --- a/src/mainboard/advantech/pcm-5820/devicetree.cb +++ /dev/null @@ -1,56 +0,0 @@ -chip northbridge/amd/gx1 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - chip southbridge/amd/cs5530 # Southbridge - device pci 12.0 on # ISA bridge - chip superio/winbond/w83977f # SUper I/O - device pnp 3f0.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 3f0.1 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 3f0.2 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 3f0.3 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 3f0.4 on # RTC / On-Now control - io 0x60 = 0x70 - irq 0x70 = 8 - end - device pnp 3f0.5 on # PS/2 keyboard / mouse - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 # PS/2 keyboard interrupt - irq 0x72 = 12 # PS/2 mouse interrupt - end - device pnp 3f0.6 on # IR - # TODO? - end - device pnp 3f0.7 on # GPIO 1 - # TODO? - end - device pnp 3f0.8 on # GPIO 2 - # TODO? - end - end - end - device pci 12.1 on end # SMI - device pci 12.2 on end # IDE - device pci 12.3 on end # Audio (onboard) - device pci 12.4 on end # VGA - device pci 13.0 on end # USB - register "ide0_enable" = "1" - register "ide1_enable" = "1" - end - end - chip cpu/amd/geode_gx1 # CPU - end -end diff --git a/src/mainboard/advantech/pcm-5820/irq_tables.c b/src/mainboard/advantech/pcm-5820/irq_tables.c deleted file mode 100644 index ac25227691..0000000000 --- a/src/mainboard/advantech/pcm-5820/irq_tables.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, - PIRQ_VERSION, - 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x12 << 3) | 0x0, /* Interrupt router device */ - 0xc00, /* IRQs devoted exclusively to PCI usage */ - 0x1078, /* Vendor */ - 0x2, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xde, /* Checksum */ - { - /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x0b << 3) | 0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0}, - {0x00, (0x13 << 3) | 0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/advantech/pcm-5820/romstage.c b/src/mainboard/advantech/pcm-5820/romstage.c deleted file mode 100644 index 77cb154172..0000000000 --- a/src/mainboard/advantech/pcm-5820/romstage.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <console/console.h> -#include "northbridge/amd/gx1/raminit.c" -#include "cpu/x86/bist.h" -#include "superio/winbond/w83977f/early_serial.c" -#include "southbridge/amd/cs5530/enable_rom.c" - -#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1) - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - cs5530_enable_rom(); - sdram_init(); -} |