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authorStefan Reinauer <stepan@coresystems.de>2008-01-18 15:08:58 +0000
committerStefan Reinauer <stepan@openbios.org>2008-01-18 15:08:58 +0000
commitf8ee1806ac524bc782c93eccc59ee3c929abddb9 (patch)
tree7daab6b3aa82476a10d38fbf68068f4a409d2ce9 /src/mainboard/agami/aruma/Options.lb
parent7e61e45402aba2b90997f4f02ca8266cf65a229a (diff)
downloadcoreboot-f8ee1806ac524bc782c93eccc59ee3c929abddb9.tar.xz
Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/agami/aruma/Options.lb')
-rw-r--r--src/mainboard/agami/aruma/Options.lb14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/agami/aruma/Options.lb b/src/mainboard/agami/aruma/Options.lb
index 04fff60e3b..47eb59fa7f 100644
--- a/src/mainboard/agami/aruma/Options.lb
+++ b/src/mainboard/agami/aruma/Options.lb
@@ -37,7 +37,7 @@ uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
-uses LINUXBIOS_EXTRA_VERSION
+uses COREBOOT_EXTRA_VERSION
uses _RAMBASE
uses CC
uses HOSTCC
@@ -140,7 +140,7 @@ default ACPI_SSDTX_NUM=3
default HAVE_OPTION_TABLE=1
##
-## Move the default LinuxBIOS cmos range off of AMD RTC registers
+## Move the default coreboot cmos range off of AMD RTC registers
##
default LB_CKS_RANGE_START=49
default LB_CKS_RANGE_END=122
@@ -196,10 +196,10 @@ default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x36c0
###
-### LinuxBIOS layout values
+### coreboot layout values
###
-## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
+## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
default ROM_IMAGE_SIZE = 65536
##
@@ -218,7 +218,7 @@ default HEAP_SIZE=0x8000
default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
##
-## LinuxBIOS C code runs at this location in RAM
+## Coreboot C code runs at this location in RAM
##
default _RAMBASE=0x00004000
@@ -262,7 +262,7 @@ default TTYS0_BASE=0x3f8
default TTYS0_LCS=0x3
##
-### Select the linuxBIOS loglevel
+### Select the coreboot loglevel
##
## EMERG 1 system is unusable
## ALERT 2 action must be taken immediately
@@ -275,7 +275,7 @@ default TTYS0_LCS=0x3
## SPEW 9 Way too many details
-## These values can be overwritten by LinuxBIOSv2/targets/agami/aruma/Config.lb
+## These values can be overwritten by corebootv2/targets/agami/aruma/Config.lb
## Request this level of debugging output
default DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging