latest agami/aruma changes. Compiles but won't boot yet

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

13 files changed, 1709 insertions, 0 deletions

diff --git a/src/mainboard/agami/aruma/dx/amd8111.asl b/src/mainboard/agami/aruma/dx/amd8111.asl
new file mode 100644
index 0000000000..a26d2b4226
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/amd8111.asl
@@ -0,0 +1,172 @@
+/*
+ * Copyright 2005 AMD
+ */
+//AMD8111
+            Name (APIC, Package (0x04)
+            {
+                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present 
+                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, 
+                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, 
+                Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
+            })
+
+            Name (PICM, Package (0x04)
+            {
+                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKA, 0x00}, 
+                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKB, 0x00}, 
+                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKC, 0x00}, 
+                Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKD, 0x00}
+            })
+
+	    Name (DNCG, Ones)
+
+            Method (_PRT, 0, NotSerialized)
+            {
+		If (LEqual (^DNCG, Ones)) {
+			Store (DADD(\_SB.PCI0.SBDN, 0x0001ffff), Local0)
+			// Update the Device Number according to SBDN
+                        Store(Local0, Index (DeRefOf (Index (PICM, 0)), 0))
+                        Store(Local0, Index (DeRefOf (Index (PICM, 1)), 0))
+                        Store(Local0, Index (DeRefOf (Index (PICM, 2)), 0))
+                        Store(Local0, Index (DeRefOf (Index (PICM, 3)), 0))
+
+                        Store(Local0, Index (DeRefOf (Index (APIC, 0)), 0))
+                        Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
+                        Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
+                        Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))
+			
+			Store (0x00, ^DNCG)
+			
+		}
+
+                If (LNot (PICF)) { 
+			Return (PICM) 
+		}
+                Else {
+			Return (APIC) 
+		}
+            }
+
+            Device (SBC3)
+            {
+                /*  acpi smbus   it should be 0x00040003 if 8131 present */
+		Method (_ADR, 0, NotSerialized)
+		{
+			Return (DADD(\_SB.PCI0.SBDN, 0x00010003))
+		}
+                OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
+                Field (PIRQ, ByteAcc, Lock, Preserve)
+                {
+                    PIBA,   8, 
+                    PIDC,   8
+                }
+/*
+                OperationRegion (TS3_, PCI_Config, 0xC4, 0x02)
+                Field (TS3_, DWordAcc, NoLock, Preserve)
+                {
+                    PTS3,   16
+                }
+*/
+            }
+
+            Device (HPET)
+            {
+                Name (HPT, 0x00)
+                Name (_HID, EisaId ("PNP0103"))
+                Name (_UID, 0x00)
+                Method (_STA, 0, NotSerialized)
+                {
+                    Return (0x0F)
+                }
+
+                Method (_CRS, 0, NotSerialized)
+                {
+                    Name (BUF0, ResourceTemplate ()
+                    {
+                        Memory32Fixed (ReadWrite, 0xFED00000, 0x00000400)
+                    })
+                    Return (BUF0)
+                }
+            }
+
+	    Include ("amd8111_pic.asl")
+
+	    Include ("amd8111_isa.asl")
+
+            Device (TP2P)
+            {
+                /* 8111 P2P and it should 0x00030000 when 8131 present*/
+                Method (_ADR, 0, NotSerialized)
+                {
+			Return (DADD(\_SB.PCI0.SBDN, 0x00000000))
+                }
+
+                Method (_PRW, 0, NotSerialized)
+                {
+                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x08, 0x03 }) }
+                    Else { Return (Package (0x02) { 0x08, 0x01 }) }
+                }
+
+                Device (USB0)
+                {
+                    Name (_ADR, 0x00000000)
+                    Method (_PRW, 0, NotSerialized)
+                    {
+                        If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) }
+                        Else { Return (Package (0x02) { 0x0F, 0x01 }) }
+                    }
+                }
+
+                Device (USB1)
+                {
+                    Name (_ADR, 0x00000001)
+                    Method (_PRW, 0, NotSerialized)
+                    {
+                        If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x0F, 0x03 }) }
+                        Else { Return (Package (0x02) { 0x0F, 0x01 }) }
+                    }
+                }
+
+                Name (APIC, Package (0x0C)
+                {
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, //USB
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
+                    Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 },
+
+                    Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10 }, //Slot 4
+                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11 },
+                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12 },
+                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13 },
+
+                    Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x11 }, //Slot 3
+                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x12 },
+                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
+                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
+                })
+	
+                Name (PICM, Package (0x0C)
+                {
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, //USB
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 },
+
+                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, //Slot 4
+                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 },
+
+                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, //Slot 3
+                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }
+                })
+
+                Method (_PRT, 0, NotSerialized)
+                {
+                    If (LNot (PICF)) { Return (PICM) }
+                    Else { Return (APIC) }
+                }
+            }
+
diff --git a/src/mainboard/agami/aruma/dx/amd8111_isa.asl b/src/mainboard/agami/aruma/dx/amd8111_isa.asl
new file mode 100644
index 0000000000..b68230607e
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/amd8111_isa.asl
@@ -0,0 +1,176 @@
+/*
+ * Copyright 2005 AMD
+ */
+//AMD8111 isa
+
+            Device (ISA)
+            {
+                /* lpc  0x00040000 */ 
+                Method (_ADR, 0, NotSerialized)
+                {
+			Return (DADD(\_SB.PCI0.SBDN, 0x00010000))
+                }
+
+                OperationRegion (PIRY, PCI_Config, 0x51, 0x02) // LPC Decode Registers
+                Field (PIRY, ByteAcc, NoLock, Preserve)
+                {
+                    Z000,   2,  // Parallel Port Range
+                        ,   1, 
+                    ECP,    1,  // ECP Enable
+                    FDC1,   1,  // Floppy Drive Controller 1
+                    FDC2,   1,  // Floppy Drive Controller 2
+                    Offset (0x01), 
+                    Z001,   3,  // Serial Port A Range
+                    SAEN,   1,  // Serial Post A Enabled
+                    Z002,   3,  // Serial Port B Range
+                    SBEN,   1  // Serial Post B Enabled
+                }
+
+                Device (PIC)
+                {
+                    Name (_HID, EisaId ("PNP0000"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x0020, 0x0020, 0x01, 0x02)
+                        IO (Decode16, 0x00A0, 0x00A0, 0x01, 0x02)
+                        IRQ (Edge, ActiveHigh, Exclusive) {2}
+                    })
+                }
+
+                Device (DMA1)
+                {
+                    Name (_HID, EisaId ("PNP0200"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x0000, 0x0000, 0x01, 0x10)
+                        IO (Decode16, 0x0080, 0x0080, 0x01, 0x10)
+                        IO (Decode16, 0x00C0, 0x00C0, 0x01, 0x20)
+                        DMA (Compatibility, NotBusMaster, Transfer16) {4}
+                    })
+                }
+
+                Device (TMR)
+                {
+                    Name (_HID, EisaId ("PNP0100"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x0040, 0x0040, 0x01, 0x04)
+                        IRQ (Edge, ActiveHigh, Exclusive) {0}
+                    })
+                }
+
+                Device (RTC)
+                {
+                    Name (_HID, EisaId ("PNP0B00"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x0070, 0x0070, 0x01, 0x06)
+                        IRQ (Edge, ActiveHigh, Exclusive) {8}
+                    })
+                }
+
+                Device (SPKR)
+                {
+                    Name (_HID, EisaId ("PNP0800"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x0061, 0x0061, 0x01, 0x01)
+                    })
+                }
+
+                Device (COPR)
+                {
+                    Name (_HID, EisaId ("PNP0C04"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x00F0, 0x00F0, 0x01, 0x10)
+                        IRQ (Edge, ActiveHigh, Exclusive) {13}
+                    })
+                }
+
+                Device (SYSR)
+                {
+                    Name (_HID, EisaId ("PNP0C02"))
+                    Name (_UID, 0x00)
+                    Name (SYR1, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x04D0, 0x04D0, 0x01, 0x02) //wrh092302 - added to report Thor NVRAM
+                        IO (Decode16, 0x1100, 0x117F, 0x01, 0x80) //wrh092302 - added to report Thor NVRAM
+                        IO (Decode16, 0x1180, 0x11FF, 0x01, 0x80)
+                        IO (Decode16, 0x0010, 0x0010, 0x01, 0x10)
+                        IO (Decode16, 0x0022, 0x0022, 0x01, 0x1E)
+                        IO (Decode16, 0x0044, 0x0044, 0x01, 0x1C)
+                        IO (Decode16, 0x0062, 0x0062, 0x01, 0x02)
+                        IO (Decode16, 0x0065, 0x0065, 0x01, 0x0B)
+                        IO (Decode16, 0x0076, 0x0076, 0x01, 0x0A)
+                        IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
+                        IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
+                        IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)
+                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error 
+                        IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
+                    })
+                    Method (_CRS, 0, NotSerialized)
+                    {
+                        Return (SYR1)
+                    }
+                }
+
+                Device (MEM)
+                {
+                    Name (_HID, EisaId ("PNP0C02"))
+                    Name (_UID, 0x01)
+                    Method (_CRS, 0, NotSerialized)
+                    {
+                        Name (BUF0, ResourceTemplate ()
+                        {
+                            Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
+                            Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
+                            Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
+                            Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
+                            Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC
+                            Memory32Fixed (ReadWrite, 0xFFF80000, 0x00080000) // Overlay BIOS
+                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS
+                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) // Overlay BIOS
+                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
+                            Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
+                        })
+			// Read the Video Memory length 
+                        CreateDWordField (BUF0, 0x14, CLEN)
+                        CreateDWordField (BUF0, 0x10, CBAS)
+
+                        ShiftLeft (VGA1, 0x09, Local0)
+                        Store (Local0, CLEN)
+
+                        Return (BUF0)
+                    }
+                }
+
+                Device (PS2M)
+                {
+                    Name (_HID, EisaId ("PNP0F13"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IRQNoFlags () {12}
+                    })
+                    Method (_STA, 0, NotSerialized)
+                    {
+                        And (FLG0, 0x04, Local0)
+                        If (LEqual (Local0, 0x04)) { Return (0x0F) }
+                        Else { Return (0x00) }
+                    }
+                }
+
+                Device (PS2K)
+                {
+                    Name (_HID, EisaId ("PNP0303"))
+                    Name (_CRS, ResourceTemplate ()
+                    {
+                        IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
+                        IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
+                        IRQNoFlags () {1}
+                    })
+                }
+		Include ("superio.asl")
+
+            }
+
diff --git a/src/mainboard/agami/aruma/dx/amd8111_pic.asl b/src/mainboard/agami/aruma/dx/amd8111_pic.asl
new file mode 100644
index 0000000000..295b6508a1
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/amd8111_pic.asl
@@ -0,0 +1,360 @@
+/*
+ * Copyright 2005 AMD
+ */
+//AMD8111 pic LNKA B C D
+
+            Device (LNKA)
+            {
+                Name (_HID, EisaId ("PNP0C0F"))
+                Name (_UID, 0x01)
+                Method (_STA, 0, NotSerialized)
+                {
+                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local0)
+                    If (LEqual (Local0, 0x00)) { Return (0x09) } //Disabled
+                    Else { Return (0x0B) } //Enabled
+                }
+
+                Method (_PRS, 0, NotSerialized)
+                {
+                    Name (BUFA, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
+                    })
+                    Return (BUFA)
+                }
+
+                Method (_DIS, 0, NotSerialized)
+                {
+                    Store (0x01, Local3)
+                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local1)
+                    Store (Local1, Local2)
+                    If (LGreater (Local1, 0x07))
+                    {
+                        Subtract (Local1, 0x08, Local1)
+                    }
+
+                    ShiftLeft (Local3, Local1, Local3)
+                    Not (Local3, Local3)
+                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, \_SB.PCI1.SBC3.PIBA)
+                }
+
+                Method (_CRS, 0, NotSerialized)
+                {
+                    Name (BUFA, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {}
+                    })
+                    CreateByteField (BUFA, 0x01, IRA1)
+                    CreateByteField (BUFA, 0x02, IRA2)
+                    Store (0x00, Local3)
+                    Store (0x00, Local4)
+                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, Local1)
+                    If (LNot (LEqual (Local1, 0x00)))
+                    {  // Routing enable
+                        If (LGreater (Local1, 0x07))
+                        {
+                            Subtract (Local1, 0x08, Local2)
+                            ShiftLeft (One, Local2, Local4)
+                        }
+                        Else
+                        {
+                            If (LGreater (Local1, 0x00))
+                            {
+                                ShiftLeft (One, Local1, Local3)
+                            }
+                        }
+
+                        Store (Local3, IRA1)
+                        Store (Local4, IRA2)
+                    }
+
+                    Return (BUFA)
+                }
+
+                Method (_SRS, 1, NotSerialized)
+                {
+                    CreateByteField (Arg0, 0x01, IRA1)
+                    CreateByteField (Arg0, 0x02, IRA2)
+                    ShiftLeft (IRA2, 0x08, Local0)
+                    Or (Local0, IRA1, Local0)
+                    Store (0x00, Local1)
+                    ShiftRight (Local0, 0x01, Local0)
+                    While (LGreater (Local0, 0x00))
+                    {
+                        Increment (Local1)
+                        ShiftRight (Local0, 0x01, Local0)
+                    }
+
+                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, \_SB.PCI1.SBC3.PIBA)
+                    Or (\_SB.PCI1.SBC3.PIBA, Local1, \_SB.PCI1.SBC3.PIBA)
+                }
+            }
+
+            Device (LNKB)
+            {
+                Name (_HID, EisaId ("PNP0C0F"))
+                Name (_UID, 0x02)
+                Method (_STA, 0, NotSerialized)
+                {
+                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local0)
+                    If (LEqual (Local0, 0x00)) { Return (0x09) }
+                    Else { Return (0x0B) }
+                }
+
+                Method (_PRS, 0, NotSerialized)
+                {
+                    Name (BUFB, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
+                    })
+                    Return (BUFB)
+                }
+
+                Method (_DIS, 0, NotSerialized)
+                {
+                    Store (0x01, Local3)
+                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local1)
+                    ShiftRight (Local1, 0x04, Local1)
+                    Store (Local1, Local2)
+                    If (LGreater (Local1, 0x07))
+                    {
+                        Subtract (Local1, 0x08, Local1)
+                    }
+
+                    ShiftLeft (Local3, Local1, Local3)
+                    Not (Local3, Local3)
+                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, \_SB.PCI1.SBC3.PIBA)
+                }
+
+                Method (_CRS, 0, NotSerialized)
+                {
+                    Name (BUFB, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {}
+                    })
+                    CreateByteField (BUFB, 0x01, IRB1)
+                    CreateByteField (BUFB, 0x02, IRB2)
+                    Store (0x00, Local3)
+                    Store (0x00, Local4)
+                    And (\_SB.PCI1.SBC3.PIBA, 0xF0, Local1)
+                    ShiftRight (Local1, 0x04, Local1)
+                    If (LNot (LEqual (Local1, 0x00)))
+                    {
+                        If (LGreater (Local1, 0x07))
+                        {
+                            Subtract (Local1, 0x08, Local2)
+                            ShiftLeft (One, Local2, Local4)
+                        }
+                        Else
+                        {
+                            If (LGreater (Local1, 0x00))
+                            {
+                                ShiftLeft (One, Local1, Local3)
+                            }
+                        }
+
+                        Store (Local3, IRB1)
+                        Store (Local4, IRB2)
+                    }
+
+                    Return (BUFB)
+                }
+
+                Method (_SRS, 1, NotSerialized)
+                {
+                    CreateByteField (Arg0, 0x01, IRB1)
+                    CreateByteField (Arg0, 0x02, IRB2)
+                    ShiftLeft (IRB2, 0x08, Local0)
+                    Or (Local0, IRB1, Local0)
+                    Store (0x00, Local1)
+                    ShiftRight (Local0, 0x01, Local0)
+                    While (LGreater (Local0, 0x00))
+                    {
+                        Increment (Local1)
+                        ShiftRight (Local0, 0x01, Local0)
+                    }
+
+                    And (\_SB.PCI1.SBC3.PIBA, 0x0F, \_SB.PCI1.SBC3.PIBA)
+                    ShiftLeft (Local1, 0x04, Local1)
+                    Or (\_SB.PCI1.SBC3.PIBA, Local1, \_SB.PCI1.SBC3.PIBA)
+                }
+            }
+
+            Device (LNKC)
+            {
+                Name (_HID, EisaId ("PNP0C0F"))
+                Name (_UID, 0x03)
+                Method (_STA, 0, NotSerialized)
+                {
+                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local0)
+                    If (LEqual (Local0, 0x00)) { Return (0x09) }
+                    Else { Return (0x0B) }
+                }
+
+                Method (_PRS, 0, NotSerialized)
+                {
+                    Name (BUFA, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
+                    })
+                    Return (BUFA)
+                }
+
+                Method (_DIS, 0, NotSerialized)
+                {
+                    Store (0x01, Local3)
+                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local1)
+                    Store (Local1, Local2)
+                    If (LGreater (Local1, 0x07))
+                    {
+                        Subtract (Local1, 0x08, Local1)
+                    }
+
+                    ShiftLeft (Local3, Local1, Local3)
+                    Not (Local3, Local3)
+                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, \_SB.PCI1.SBC3.PIDC)
+                }
+
+                Method (_CRS, 0, NotSerialized)
+                {
+                    Name (BUFA, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {}
+                    })
+                    CreateByteField (BUFA, 0x01, IRA1)
+                    CreateByteField (BUFA, 0x02, IRA2)
+                    Store (0x00, Local3)
+                    Store (0x00, Local4)
+                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, Local1)
+                    If (LNot (LEqual (Local1, 0x00)))
+                    {
+                        If (LGreater (Local1, 0x07))
+                        {
+                            Subtract (Local1, 0x08, Local2)
+                            ShiftLeft (One, Local2, Local4)
+                        }
+                        Else
+                        {
+                            If (LGreater (Local1, 0x00))
+                            {
+                                ShiftLeft (One, Local1, Local3)
+                            }
+                        }
+
+                        Store (Local3, IRA1)
+                        Store (Local4, IRA2)
+                    }
+
+                    Return (BUFA)
+                }
+
+                Method (_SRS, 1, NotSerialized)
+                {
+                    CreateByteField (Arg0, 0x01, IRA1)
+                    CreateByteField (Arg0, 0x02, IRA2)
+                    ShiftLeft (IRA2, 0x08, Local0)
+                    Or (Local0, IRA1, Local0)
+                    Store (0x00, Local1)
+                    ShiftRight (Local0, 0x01, Local0)
+                    While (LGreater (Local0, 0x00))
+                    {
+                        Increment (Local1)
+                        ShiftRight (Local0, 0x01, Local0)
+                    }
+
+                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, \_SB.PCI1.SBC3.PIDC)
+                    Or (\_SB.PCI1.SBC3.PIDC, Local1, \_SB.PCI1.SBC3.PIDC)
+                }
+            }
+
+            Device (LNKD)
+            {
+                Name (_HID, EisaId ("PNP0C0F"))
+                Name (_UID, 0x04)
+                Method (_STA, 0, NotSerialized)
+                {
+                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local0)
+                    If (LEqual (Local0, 0x00)) { Return (0x09) }
+                    Else { Return (0x0B) }
+                }
+
+                Method (_PRS, 0, NotSerialized)
+                {
+                    Name (BUFB, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {3,5,10,11}
+                    })
+                    Return (BUFB)
+                }
+
+                Method (_DIS, 0, NotSerialized)
+                {
+                    Store (0x01, Local3)
+                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local1)
+                    ShiftRight (Local1, 0x04, Local1)
+                    Store (Local1, Local2)
+                    If (LGreater (Local1, 0x07))
+                    {
+                        Subtract (Local1, 0x08, Local1)
+                    }
+
+                    ShiftLeft (Local3, Local1, Local3)
+                    Not (Local3, Local3)
+                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, \_SB.PCI1.SBC3.PIDC)
+                }
+
+                Method (_CRS, 0, NotSerialized)
+                {
+                    Name (BUFB, ResourceTemplate ()
+                    {
+                        IRQ (Level, ActiveLow, Shared) {}
+                    })
+                    CreateByteField (BUFB, 0x01, IRB1)
+                    CreateByteField (BUFB, 0x02, IRB2)
+                    Store (0x00, Local3)
+                    Store (0x00, Local4)
+                    And (\_SB.PCI1.SBC3.PIDC, 0xF0, Local1)
+                    ShiftRight (Local1, 0x04, Local1)
+                    If (LNot (LEqual (Local1, 0x00)))
+                    {
+                        If (LGreater (Local1, 0x07))
+                        {
+                            Subtract (Local1, 0x08, Local2)
+                            ShiftLeft (One, Local2, Local4)
+                        }
+                        Else
+                        {
+                            If (LGreater (Local1, 0x00))
+                            {
+                                ShiftLeft (One, Local1, Local3)
+                            }
+                        }
+
+                        Store (Local3, IRB1)
+                        Store (Local4, IRB2)
+                    }
+
+                    Return (BUFB)
+                }
+
+                Method (_SRS, 1, NotSerialized)
+                {
+                    CreateByteField (Arg0, 0x01, IRB1)
+                    CreateByteField (Arg0, 0x02, IRB2)
+                    ShiftLeft (IRB2, 0x08, Local0)
+                    Or (Local0, IRB1, Local0)
+                    Store (0x00, Local1)
+                    ShiftRight (Local0, 0x01, Local0)
+                    While (LGreater (Local0, 0x00))
+                    {
+                        Increment (Local1)
+                        ShiftRight (Local0, 0x01, Local0)
+                    }
+
+                    And (\_SB.PCI1.SBC3.PIDC, 0x0F, \_SB.PCI1.SBC3.PIDC)
+                    ShiftLeft (Local1, 0x04, Local1)
+                    Or (\_SB.PCI1.SBC3.PIDC, Local1, \_SB.PCI1.SBC3.PIDC)
+                }
+            }
+
+
diff --git a/src/mainboard/agami/aruma/dx/amd8131.asl b/src/mainboard/agami/aruma/dx/amd8131.asl
new file mode 100644
index 0000000000..3761eb063f
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/amd8131.asl
@@ -0,0 +1,119 @@
+/*
+ * Copyright 2005 AMD
+ */
+		
+            Device (PG0A)
+            {
+                /*  8132 pcix bridge*/
+                Method (_ADR, 0, NotSerialized)
+                {
+                        Return (DADD(GHCD(HCIN, 0), 0x00000000))
+                }
+
+                Method (_PRW, 0, NotSerialized)
+                {
+                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) }
+                    Else { Return (Package (0x02) { 0x29, 0x01 }) }
+                }
+
+                Name (APIC, Package (0x14)
+                {
+		    // Slot A - PIRQ BCDA
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
+ 
+		    //Cypress Slot A - PIRQ BCDA
+                    Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //?
+                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, 
+
+		    //Cypress Slot B - PIRQ CDAB
+                    Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //?
+                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, 
+                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, 
+
+		    //Cypress Slot C - PIRQ DABC
+                    Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //?
+                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, 
+                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, 
+
+		    //Cypress Slot D - PIRQ ABCD
+                    Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //?
+                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B }
+                })
+                Name (PICM, Package (0x14)
+                {
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 },//Slot 2 
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
+
+                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
+
+                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKB, 0x00 }, 
+
+                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKC, 0x00 }, 
+
+                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
+                })
+                Method (_PRT, 0, NotSerialized)
+                {
+                    If (LNot (PICF)) { Return (PICM) }
+                    Else { Return (APIC) }
+                }
+            }
+
+            Device (PG0B)
+            {
+                /*  8132 pcix bridge*/
+                Method (_ADR, 0, NotSerialized)
+                {
+                        Return (DADD(GHCD(HCIN, 0), 0x00010000))
+                }
+
+                Method (_PRW, 0, NotSerialized)
+                {
+                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) }
+                    Else { Return (Package (0x02) { 0x22, 0x01 }) }
+                }
+
+                Name (APIC, Package (0x04)
+                {
+		    // Slot A - PIRQ ABCD
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 }
+                })
+                Name (PICM, Package (0x04)
+                {
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 },//Slot 1 
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
+                })
+                Method (_PRT, 0, NotSerialized)
+                {
+                    If (LNot (PICF)) { Return (PICM) }
+                    Else { Return (APIC) }
+                }
+            }
diff --git a/src/mainboard/agami/aruma/dx/amd8131_1.asl b/src/mainboard/agami/aruma/dx/amd8131_1.asl
new file mode 100644
index 0000000000..1545169e22
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/amd8131_1.asl
@@ -0,0 +1,119 @@
+/*
+ * Copyright 2005 AMD
+ */
+		
+            Device (PG1A)
+            {
+                /*  8132 pcix bridge*/
+                Method (_ADR, 0, NotSerialized)
+                {
+                        Return (DADD(GHCD(HCIN, 1), 0x00000000))
+                }
+
+                Method (_PRW, 0, NotSerialized)
+                {
+                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) }
+                    Else { Return (Package (0x02) { 0x29, 0x01 }) }
+                }
+
+                Name (APIC, Package (0x14)
+                {
+		    // Slot A - PIRQ BCDA
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
+ 
+		    //Cypress Slot A - PIRQ BCDA
+                    Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //?
+                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, 
+
+		    //Cypress Slot B - PIRQ CDAB
+                    Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //?
+                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, 
+                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, 
+
+		    //Cypress Slot C - PIRQ DABC
+                    Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //?
+                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, 
+                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, 
+
+		    //Cypress Slot D - PIRQ ABCD
+                    Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //?
+                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B }
+                })
+                Name (PICM, Package (0x14)
+                {
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 },//Slot 2 
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
+
+                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI1.LNKA, 0x00 }, 
+
+                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI1.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI1.LNKB, 0x00 }, 
+
+                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI1.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI1.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI1.LNKC, 0x00 }, 
+
+                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
+                })
+                Method (_PRT, 0, NotSerialized)
+                {
+                    If (LNot (PICF)) { Return (PICM) }
+                    Else { Return (APIC) }
+                }
+            }
+
+            Device (PG1B)
+            {
+                /*  8132 pcix bridge*/
+                Method (_ADR, 0, NotSerialized)
+                {
+                        Return (DADD(GHCD(HCIN, 1), 0x00010000))
+                }
+
+                Method (_PRW, 0, NotSerialized)
+                {
+                    If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x22, 0x03 }) }
+                    Else { Return (Package (0x02) { 0x22, 0x01 }) }
+                }
+
+                Name (APIC, Package (0x04)
+                {
+		    // Slot A - PIRQ ABCD
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 }
+                })
+                Name (PICM, Package (0x04)
+                {
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI1.LNKA, 0x00 },//Slot 1 
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI1.LNKB, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI1.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI1.LNKD, 0x00 }
+                })
+                Method (_PRT, 0, NotSerialized)
+                {
+                    If (LNot (PICF)) { Return (PICM) }
+                    Else { Return (APIC) }
+                }
+            }
diff --git a/src/mainboard/agami/aruma/dx/amdk8_util.asl b/src/mainboard/agami/aruma/dx/amdk8_util.asl
new file mode 100644
index 0000000000..e9155476c5
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/amdk8_util.asl
@@ -0,0 +1,315 @@
+/*
+ * Copyright 2005 AMD
+ */
+
+//AMD k8 util for BUSB and res range
+
+    Scope (\_SB)
+    {
+
+        Name (OSTB, Ones)
+        Method (OSTP, 0, NotSerialized)
+        {
+            If (LEqual (^OSTB, Ones))
+            {
+                Store (0x00, ^OSTB)
+            }
+
+            Return (^OSTB)
+        }
+
+       Method (SEQL, 2, Serialized)
+        {
+            Store (SizeOf (Arg0), Local0)
+            Store (SizeOf (Arg1), Local1)
+            If (LNot (LEqual (Local0, Local1))) { Return (Zero) }
+
+            Name (BUF0, Buffer (Local0) {})
+            Store (Arg0, BUF0)
+            Name (BUF1, Buffer (Local0) {})
+            Store (Arg1, BUF1)
+            Store (Zero, Local2)
+            While (LLess (Local2, Local0))
+            {
+                Store (DerefOf (Index (BUF0, Local2)), Local3)
+                Store (DerefOf (Index (BUF1, Local2)), Local4)
+                If (LNot (LEqual (Local3, Local4))) { Return (Zero) }
+
+                Increment (Local2)
+            }
+
+            Return (One)
+        }
+
+
+        Method (DADD, 2, NotSerialized)
+        {
+                Store( Arg1, Local0)
+                Store( Arg0, Local1)
+                Add( ShiftLeft(Local1,16), Local0, Local0)
+                Return (Local0)
+        }
+
+
+	Method (GHCE, 1, NotSerialized) // check if the HC enabled
+	{
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+                if(LEqual ( And(Local1, 0x01), 0x01)) { Return (0x0F) }
+                Else { Return (0x00) }
+	}
+
+        Method (GHCN, 1, NotSerialized) // get the node num for the HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+		Store (ShiftRight( And (Local1, 0xf0), 0x04), Local0)
+		Return (Local0)
+        }
+
+        Method (GHCL, 1, NotSerialized) // get the link num on node for the HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCLK, Arg0)), Local1)
+                Store (ShiftRight( And (Local1, 0xf00), 0x08), Local0)
+                Return (Local0)
+        }
+
+        Method (GHCD, 2, NotSerialized) // get the unit id base for the HT device in HC
+        {
+                Store (0x00, Local0)
+                Store (DerefOf (Index (\_SB.PCI0.HCDN, Arg0)), Local1)
+		Store (Arg1, Local2) // Arg1 could be 3, 2, 1, 0
+		Multiply (Local2, 0x08, Local2) // change to 24, 16, 8, 0
+                Store (And (ShiftRight( Local1, Local2), 0xff), Local0)
+                Return (Local0)
+        }
+
+        Method (GBUS, 2, NotSerialized)
+        {
+            Store (0x00, Local0)
+            While (LLess (Local0, 0x04))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
+                        {
+                            Return (ShiftRight (And (Local1, 0x00FF0000), 0x10))
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            Return (0x00)
+        }
+
+        Method (GWBN, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+                    0x0000, // Address Space Granularity
+                    0x0000, // Address Range Minimum
+                    0x0000, // Address Range Maximum
+                    0x0000, // Address Translation Offset
+                    0x0000,,,)
+            })
+            CreateWordField (BUF0, 0x08, BMIN)
+            CreateWordField (BUF0, 0x0A, BMAX)
+            CreateWordField (BUF0, 0x0E, BLEN)
+            Store (0x00, Local0)
+            While (LLess (Local0, 0x04))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.BUSN, Local0)), Local1)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, ShiftRight (And (Local1, 0x70), 0x04)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local1, 0x0300), 0x08))))
+                        {
+                            Store (ShiftRight (And (Local1, 0x00FF0000), 0x10), BMIN)
+                            Store (ShiftRight (Local1, 0x18), BMAX)
+                            Subtract (BMAX, BMIN, BLEN)
+                            Increment (BLEN)
+                            Return (RTAG (BUF0))
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            Return (RTAG (BUF0))
+        }
+
+        Method (GMEM, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+                    0x00000000, // Address Space Granularity
+                    0x00000000, // Address Range Minimum
+                    0x00000000, // Address Range Maximum
+                    0x00000000, // Address Translation Offset
+                    0x00000000,,,
+                    , AddressRangeMemory, TypeStatic)
+            })
+            CreateDWordField (BUF0, 0x0A, MMIN)
+            CreateDWordField (BUF0, 0x0E, MMAX)
+            CreateDWordField (BUF0, 0x16, MLEN)
+            Store (0x00, Local0)
+            Store (0x00, Local4)
+	    Store (0x00, Local3)
+            While (LLess (Local0, 0x10))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local1)
+                Increment (Local0)
+                Store (DerefOf (Index (\_SB.PCI0.MMIO, Local0)), Local2)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, And (Local2, 0x07)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
+                        {
+                            Store (ShiftLeft (And (Local1, 0xFFFFFF00), 0x08), MMIN)
+                            Store (ShiftLeft (And (Local2, 0xFFFFFF00), 0x08), MMAX)
+                            Or (MMAX, 0xFFFF, MMAX)
+                            Subtract (MMAX, MMIN, MLEN)
+
+                            If (Local4)
+                            {
+                                Concatenate (RTAG (BUF0), Local3, Local5)
+                               	Store (Local5, Local3)
+                            }
+                            Else
+                            {
+                                If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
+                                {
+                                    Store (\_SB.PCI0.TOM1, MMIN)
+                                    Subtract (MMAX, MMIN, MLEN)
+                                    Increment (MLEN)
+                                }
+
+                                Store (RTAG (BUF0), Local3)
+                            }
+
+                            Increment (Local4)
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            If (LNot (Local4))
+            {
+                Store (BUF0, Local3)
+            }
+
+            Return (Local3)
+        }
+
+        Method (GIOR, 2, NotSerialized)
+        {
+            Name (BUF0, ResourceTemplate ()
+            {
+                DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+                    0x00000000, // Address Space Granularity
+                    0x00000000, // Address Range Minimum
+                    0x00000000, // Address Range Maximum
+                    0x00000000, // Address Translation Offset
+                    0x00000000,,,
+                    , TypeStatic)
+            })
+            CreateDWordField (BUF0, 0x0A, PMIN)
+            CreateDWordField (BUF0, 0x0E, PMAX)
+            CreateDWordField (BUF0, 0x16, PLEN)
+            Store (0x00, Local0)
+            Store (0x00, Local4)
+	    Store (0x00, Local3)
+            While (LLess (Local0, 0x08))
+            {
+                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local1)
+                Increment (Local0)
+                Store (DerefOf (Index (\_SB.PCI0.PCIO, Local0)), Local2)
+                If (LEqual (And (Local1, 0x03), 0x03))
+                {
+                    If (LEqual (Arg0, And (Local2, 0x07)))
+                    {
+                        If (LOr (LEqual (Arg1, 0xFF), LEqual (Arg1, ShiftRight (And (Local2, 0x30), 0x04))))
+                        {
+                            Store (And (Local1, 0x01FFF000), PMIN)
+                            Store (And (Local2, 0x01FFF000), PMAX)
+                            Or (PMAX, 0x0FFF, PMAX)
+                            Subtract (PMAX, PMIN, PLEN)
+                            Increment (PLEN)
+
+                            If (Local4)
+                            {
+                                Concatenate (RTAG (BUF0), Local3, Local5)
+       	                        Store (Local5, Local3)
+                            }
+                            Else
+                            {
+                                If (LGreater (PMAX, PMIN))
+                                {
+                                    If (LOr (LAnd (LEqual (Arg1, 0xFF), LEqual (Arg0, 0x00)), LEqual (Arg1, \_SB.PCI0.SBLK)))
+                                    {
+                                        Store (0x0D00, PMIN)
+                                        Subtract (PMAX, PMIN, PLEN)
+                                        Increment (PLEN)
+                                    }
+
+                                    Store (RTAG (BUF0), Local3)
+                                    Increment (Local4)
+                                }
+
+                                If (And (Local1, 0x10))
+                                {
+                                    Store (0x03B0, PMIN)
+                                    Store (0x03DF, PMAX)
+                                    Store (0x30, PLEN)
+                                    If (Local4)
+                                    {
+                                        Concatenate (RTAG (BUF0), Local3, Local5)
+                                        Store (Local5, Local3)
+                                    }
+                                    Else
+                                    {
+                                        Store (RTAG (BUF0), Local3)
+                                    }
+                                }
+                            }
+
+                            Increment (Local4)
+                        }
+                    }
+                }
+
+                Increment (Local0)
+            }
+
+            If (LNot (Local4))
+            {
+                Store (RTAG (BUF0), Local3)
+            }
+
+            Return (Local3)
+        }
+
+        Method (RTAG, 1, NotSerialized)
+        {
+            Store (Arg0, Local0)
+            Store (SizeOf (Local0), Local1)
+            Subtract (Local1, 0x02, Local1)
+            Multiply (Local1, 0x08, Local1)
+            CreateField (Local0, 0x00, Local1, RETB)
+            Store (RETB, Local2)
+            Return (Local2)
+        }
+    }
+
diff --git a/src/mainboard/agami/aruma/dx/dsdt_lb.dsl b/src/mainboard/agami/aruma/dx/dsdt_lb.dsl
new file mode 100644
index 0000000000..dee2cbb674
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/dsdt_lb.dsl
@@ -0,0 +1,235 @@
+/*
+ * Copyright 2005 AMD
+ */
+DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
+{
+    Scope (_PR)
+    {
+        Processor (CPU0, 0x00, 0x0000C010, 0x06) {}
+        Processor (CPU1, 0x01, 0x00000000, 0x00) {}
+        Processor (CPU2, 0x02, 0x00000000, 0x00) {}
+        Processor (CPU3, 0x03, 0x00000000, 0x00) {}
+
+    }
+
+    Method (FWSO, 0, NotSerialized) { }
+
+    Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
+    Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
+    Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
+    Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
+
+    Scope (_SB)
+    {
+        Device (PCI0)
+        {
+	    /* BUS0 root bus */
+
+/*
+//hardcode begin
+            Name (BUSN, Package (0x04) { 0x04010003, 0x06050013, 0x00000000, 0x00000000 })
+            Name (MMIO, Package (0x10) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+                                         0x00f43003, 0x00f44f01, 0x0000d003, 0x00efff01, 0x00f40003, 0x00f42f00, 0x00f45003, 0x00f44f00 })
+            Name (PCIO, Package (0x08) { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001003, 0x00001000, 0x00002003, 0x00002001 })
+            Name (SBLK, 0x00)
+            Name (TOM1, 0x40000000)
+
+	    // for AMD opteron we could have four chains, so we will have PCI1, PCI2, PCI3, PCI4
+	    // PCI1 must be SBLK Chain
+	    // If you have HT IO card that is connected to PCI2, PCI3, PCI4, then you man put Device in SSDT2, SSDT3, SSDT4,  
+	    //    in acpi_tables.c you can link those SSDT to RSDT according to it's presence.
+	    // Otherwise put the PCI2, PCI3, PCI4 in this dsdt
+    	    Name (HCLK, Package (0x04) { 0x00000001, 0x00000011, 0x00000000, 0x00000000 }) //[0,3]=1 enable [4,7]=node_id, [8,15]=linkn
+
+	    Name (SBDN, 3)  // 8111 UnitID Base
+//hardcode end
+*/
+	    External (BUSN)
+	    External (MMIO)
+	    External (PCIO)
+	    External (SBLK)
+	    External (TOM1)
+	    External (HCLK)
+	    External (SBDN)
+	    External (HCDN)
+
+            Name (_HID, EisaId ("PNP0A03"))
+            Name (_ADR, 0x00180000)
+            Name (_UID, 0x01)
+	    Name (_BBN, 0)
+
+
+	    // define L1IC Link1 on node0 init completed, so node1 is installed
+	    // We must make sure our bus is 0 ? 
+            OperationRegion (LDT1, PCI_Config, 0xA4, 0x01)
+            Field (LDT1, ByteAcc, Lock, Preserve)
+            {
+                    ,   5,
+                L1IC,   1
+            }
+
+	}
+	
+	Device (PCI1)
+	{
+	    Name (HCIN, 0x00)  // HC1
+	    // BUS 1 first HT Chain
+            Name (_HID, EisaId ("PNP0A03"))
+            Name (_ADR, 0x00180000)  // Fake 
+            Name (_UID, 0x02)
+            Method (_BBN, 0, NotSerialized)
+            {
+                Return (GBUS (0x00, \_SB.PCI0.SBLK))
+            }
+
+            Method (_CRS, 0, NotSerialized)
+            {
+                Name (BUF0, ResourceTemplate ()
+                {
+                    IO (Decode16, 0x0CF8, 0x0CF8, 0x01, 0x08) //CF8-CFFh
+                    IO (Decode16, 0xC000, 0xC000, 0x01, 0x80) //8000h
+                    IO (Decode16, 0xC080, 0xC080, 0x01, 0x80) //8080h
+
+                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+                        0x0000, // Address Space Granularity
+                        0x8100, // Address Range Minimum
+                        0xFFFF, // Address Range Maximum
+                        0x0000, // Address Translation Offset
+                        0x7F00,,,
+                        , TypeStatic)    //8100h-FFFFh
+
+                    DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
+                        0x00000000, // Address Space Granularity
+                        0x000C0000, // Address Range Minimum
+                        0x00000000, // Address Range Maximum
+                        0x00000000, // Address Translation Offset
+                        0x00000000,,,
+                        , AddressRangeMemory, TypeStatic)   //Video BIOS A0000h-C7FFFh
+
+                    Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF
+
+                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+                        0x0000, // Address Space Granularity
+                        0x0000, // Address Range Minimum
+                        0x03AF, // Address Range Maximum
+                        0x0000, // Address Translation Offset
+                        0x03B0,,,
+                        , TypeStatic)  //0-CF7h
+
+                    WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+                        0x0000, // Address Space Granularity
+                        0x03E0, // Address Range Minimum
+                        0x0CF7, // Address Range Maximum
+                        0x0000, // Address Translation Offset
+                        0x0918,,,
+                        , TypeStatic)  //0-CF7h
+                })
+                \_SB.OSTP ()
+                CreateDWordField (BUF0, 0x3E, VLEN)
+                CreateDWordField (BUF0, 0x36, VMAX)
+                CreateDWordField (BUF0, 0x32, VMIN)
+                ShiftLeft (VGA1, 0x09, Local0)
+                Add (VMIN, Local0, VMAX)
+                Decrement (VMAX)
+                Store (Local0, VLEN)
+                Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
+                Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
+                Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
+                Return (Local3) 
+	    }
+
+	    Include ("pci1_hc.asl")
+		
+        }
+
+    }
+
+    Scope (_GPE)
+    {
+        Method (_L08, 0, NotSerialized)
+        {
+            Notify (\_SB.PCI1, 0x02) //PME# Wakeup
+        }
+
+        Method (_L0F, 0, NotSerialized)
+        {
+            Notify (\_SB.PCI1.TP2P.USB0, 0x02)  //USB Wakeup
+        }
+
+        Method (_L22, 0, NotSerialized) // GPIO18 (LID) - Pogo 0 Bridge B
+        {
+            Notify (\_SB.PCI1.PG0B, 0x02)
+        }
+
+        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A 
+        {
+            Notify (\_SB.PCI1.PG0A, 0x02)
+        }
+    }
+
+    Method (_PTS, 1, NotSerialized)
+    {
+        Or (Arg0, 0xF0, Local0)
+        Store (Local0, DBG1)
+    }
+/*
+    Method (_WAK, 1, NotSerialized)
+    {
+        Or (Arg0, 0xE0, Local0)
+        Store (Local0, DBG1)
+    }
+*/
+    Name (PICF, 0x00) //Flag Variable for PIC vs. I/O APIC Mode
+    Method (_PIC, 1, NotSerialized) //PIC Flag and Interface Method
+    {
+        Store (Arg0, PICF)
+    }
+
+    OperationRegion (DEBG, SystemIO, 0x80, 0x01)
+    Field (DEBG, ByteAcc, Lock, Preserve)
+    {
+        DBG1,   8
+    }
+
+    OperationRegion (EXTM, SystemMemory, 0x000FF83C, 0x04)
+    Field (EXTM, WordAcc, Lock, Preserve)
+    {
+        AMEM,   32
+    }
+
+    OperationRegion (VGAM, SystemMemory, 0x000C0002, 0x01)
+    Field (VGAM, ByteAcc, Lock, Preserve)
+    {
+        VGA1,   8
+    }
+
+    OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
+    Field (GRAM, ByteAcc, Lock, Preserve)
+    {
+        Offset (0x10), 
+        FLG0,   8
+    }
+
+    OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
+    Field (GSTS, ByteAcc, NoLock, Preserve)
+    {
+            ,   4, 
+        IRQR,   1
+    }
+
+    OperationRegion (Z007, SystemIO, 0x21, 0x01)
+    Field (Z007, ByteAcc, NoLock, Preserve)
+    {
+        Z008,   8
+    }
+
+    OperationRegion (Z009, SystemIO, 0xA1, 0x01)
+    Field (Z009, ByteAcc, NoLock, Preserve)
+    {
+        Z00A,   8
+    }
+
+    Include ("amdk8_util.asl")
+
+}
+
diff --git a/src/mainboard/agami/aruma/dx/pci1_hc.asl b/src/mainboard/agami/aruma/dx/pci1_hc.asl
new file mode 100644
index 0000000000..b1e9562f6b
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/pci1_hc.asl
@@ -0,0 +1,2 @@
+	Include ("amd8111.asl") //real SB at first
+	Include ("amd8131.asl")
diff --git a/src/mainboard/agami/aruma/dx/pci2.asl b/src/mainboard/agami/aruma/dx/pci2.asl
new file mode 100644
index 0000000000..7adb5a5e93
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/pci2.asl
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2005 AMD
+ */
+DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
+{
+    Scope (_SB)
+    {
+	External (DADD, MethodObj)
+	External (GHCE, MethodObj)
+	External (GHCN, MethodObj)
+	External (GHCL, MethodObj)
+	External (GHCD, MethodObj)
+	External (GNUS, MethodObj)
+	External (GIOR, MethodObj)
+	External (GMEM, MethodObj)
+	External (GWBN, MethodObj)
+	External (GBUS, MethodObj)
+
+	External (PICF)
+
+	External (\_SB.PCI1.LNKA, DeviceObj)
+	External (\_SB.PCI1.LNKB, DeviceObj)
+	External (\_SB.PCI1.LNKC, DeviceObj)
+	External (\_SB.PCI1.LNKD, DeviceObj)
+	
+
+        Device (PCI2)
+        {
+
+	    // BUS ? Second HT Chain
+	    Name (HCIN, 0x01)  // HC2
+
+	    Name (_HID, "PNP0A03") 
+
+            Method (_ADR, 0, NotSerialized) //Fake bus should be 0
+	    {
+		Return (DADD(GHCN(HCIN), 0x00180000))
+	    }
+	
+            Name (_UID,  0x03) 
+
+            Method (_BBN, 0, NotSerialized)
+            {
+                Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
+            }
+
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (\_SB.GHCE(HCIN)) 
+            }
+
+            Method (_CRS, 0, NotSerialized)
+            {
+                Name (BUF0, ResourceTemplate () { })
+		Store( GHCN(HCIN), Local4)
+		Store( GHCL(HCIN), Local5)
+
+                Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1)
+                Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2)
+                Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3)
+                Return (Local3)
+            }
+
+	    Include ("pci2_hc.asl")
+        }
+    }
+
+}
+
diff --git a/src/mainboard/agami/aruma/dx/pci2_hc.asl b/src/mainboard/agami/aruma/dx/pci2_hc.asl
new file mode 100644
index 0000000000..3f652e7f84
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/pci2_hc.asl
@@ -0,0 +1,3 @@
+	Include ("amd8131.asl")
+
+	Include ("amd8131_1.asl")
diff --git a/src/mainboard/agami/aruma/dx/pci3.asl b/src/mainboard/agami/aruma/dx/pci3.asl
new file mode 100644
index 0000000000..4b62a8ac31
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/pci3.asl
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2005 AMD
+ */
+DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
+{
+    Scope (_SB)
+    {
+	External (DADD, MethodObj)
+	External (GHCE, MethodObj)
+	External (GHCN, MethodObj)
+	External (GHCL, MethodObj)
+	External (GHCD, MethodObj)
+	External (GNUS, MethodObj)
+	External (GIOR, MethodObj)
+	External (GMEM, MethodObj)
+	External (GWBN, MethodObj)
+	External (GBUS, MethodObj)
+
+	External (PICF)
+
+	External (\_SB.PCI1.LNKA, DeviceObj)
+	External (\_SB.PCI1.LNKB, DeviceObj)
+	External (\_SB.PCI1.LNKC, DeviceObj)
+	External (\_SB.PCI1.LNKD, DeviceObj)
+	
+
+        Device (PCI3)
+        {
+
+	    // BUS ? Second HT Chain
+	    Name (HCIN, 0x02)  // HC3
+
+	    Name (_HID, "PNP0A03") 
+
+            Method (_ADR, 0, NotSerialized) //Fake bus should be 0
+	    {
+		Return (DADD(GHCN(HCIN), 0x00180000))
+	    }
+	
+            Name (_UID,  0x04) 
+
+            Method (_BBN, 0, NotSerialized)
+            {
+                Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
+            }
+
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (\_SB.GHCE(HCIN)) 
+            }
+
+            Method (_CRS, 0, NotSerialized)
+            {
+                Name (BUF0, ResourceTemplate () { })
+		Store( GHCN(HCIN), Local4)
+		Store( GHCL(HCIN), Local5)
+
+                Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1)
+                Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2)
+                Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3)
+                Return (Local3)
+            }
+
+	    Include ("pci2_hc.asl")
+        }
+    }
+
+}
+
diff --git a/src/mainboard/agami/aruma/dx/pci4.asl b/src/mainboard/agami/aruma/dx/pci4.asl
new file mode 100644
index 0000000000..ae0700405a
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/pci4.asl
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2005 AMD
+ */
+DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
+{
+    Scope (_SB)
+    {
+	External (DADD, MethodObj)
+	External (GHCE, MethodObj)
+	External (GHCN, MethodObj)
+	External (GHCL, MethodObj)
+	External (GHCD, MethodObj)
+	External (GNUS, MethodObj)
+	External (GIOR, MethodObj)
+	External (GMEM, MethodObj)
+	External (GWBN, MethodObj)
+	External (GBUS, MethodObj)
+
+	External (PICF)
+
+	External (\_SB.PCI1.LNKA, DeviceObj)
+	External (\_SB.PCI1.LNKB, DeviceObj)
+	External (\_SB.PCI1.LNKC, DeviceObj)
+	External (\_SB.PCI1.LNKD, DeviceObj)
+	
+
+        Device (PCI4)
+        {
+
+	    // BUS ? Second HT Chain
+	    Name (HCIN, 0x03)  // HC4
+
+	    Name (_HID, "PNP0A03") 
+
+            Method (_ADR, 0, NotSerialized) //Fake bus should be 0
+	    {
+		Return (DADD(GHCN(HCIN), 0x00180000))
+	    }
+	
+            Name (_UID,  0x05) 
+
+            Method (_BBN, 0, NotSerialized)
+            {
+                Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
+            }
+
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (\_SB.GHCE(HCIN)) 
+            }
+
+            Method (_CRS, 0, NotSerialized)
+            {
+                Name (BUF0, ResourceTemplate () { })
+		Store( GHCN(HCIN), Local4)
+		Store( GHCL(HCIN), Local5)
+
+                Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1)
+                Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2)
+                Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3)
+                Return (Local3)
+            }
+
+	    Include ("pci2_hc.asl")
+        }
+    }
+
+}
+
diff --git a/src/mainboard/agami/aruma/dx/superio.asl b/src/mainboard/agami/aruma/dx/superio.asl
new file mode 100644
index 0000000000..86a10a94ae
--- /dev/null
+++ b/src/mainboard/agami/aruma/dx/superio.asl
@@ -0,0 +1 @@
+//	Include ("w83627hf.asl")