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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-02-26 10:11:21 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-08 04:08:00 +0100
commit1b183aa6ce78af27c2e42aa51626f76a4b5d5bb0 (patch)
tree8148c084ef3cdbc6ed86972694864ef910d6668e /src/mainboard/amd/bettong
parent3444a9d716ba52f9bd8fb03870442ab1ce1654cf (diff)
downloadcoreboot-1b183aa6ce78af27c2e42aa51626f76a4b5d5bb0.tar.xz
binaryPI boards: Drop any ACPI S3 support
None of the boards currently have HAVE_ACPI_RESUME and and ACPI S3 support calls should not appear under board directories anyways. Change-Id: I1abd40ddba64be25b823abf801988863950c1eb5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18500 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/mainboard/amd/bettong')
-rw-r--r--src/mainboard/amd/bettong/mainboard.c3
-rw-r--r--src/mainboard/amd/bettong/romstage.c30
2 files changed, 7 insertions, 26 deletions
diff --git a/src/mainboard/amd/bettong/mainboard.c b/src/mainboard/amd/bettong/mainboard.c
index c31f5b7995..11d6084315 100644
--- a/src/mainboard/amd/bettong/mainboard.c
+++ b/src/mainboard/amd/bettong/mainboard.c
@@ -84,9 +84,6 @@ static void bettong_enable(device_t dev)
{
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
- if (acpi_is_wakeup_s3())
- agesawrapper_fchs3earlyrestore();
-
/* Initialize the PIRQ data structures for consumption */
pirq_setup();
}
diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index 6b12afc83b..29cd8a7284 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -20,7 +20,6 @@
#include <cpu/x86/lapic.h>
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
-#include <cpu/amd/pi/s3_resume.h>
#include <northbridge/amd/pi/agesawrapper.h>
#include <northbridge/amd/pi/agesawrapper_call.h>
#include <southbridge/amd/pi/hudson/hudson.h>
@@ -28,9 +27,6 @@
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
-#if CONFIG_HAVE_ACPI_RESUME
- void *resume_backup_memory;
-#endif
/* Must come first to enable PCI MMCONF. */
amd_initmmio();
@@ -63,27 +59,15 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x39);
AGESAWRAPPER(amdinitearly);
- int s3resume = acpi_is_wakeup_s3();
- if (!s3resume) {
- post_code(0x40);
- AGESAWRAPPER(amdinitpost);
- post_code(0x41);
- AGESAWRAPPER(amdinitenv);
- /* TODO: Disable cache is not ok. */
- disable_cache_as_ram();
- } else { /* S3 detect */
- printk(BIOS_INFO, "S3 detected\n");
-
- post_code(0x60);
- AGESAWRAPPER(amdinitresume);
- AGESAWRAPPER(amds3laterestore);
-
- post_code(0x61);
- prepare_for_resume();
- }
+ post_code(0x40);
+ AGESAWRAPPER(amdinitpost);
+ post_code(0x41);
+ AGESAWRAPPER(amdinitenv);
+ /* TODO: Disable cache is not ok. */
+ disable_cache_as_ram();
- if (s3resume || acpi_is_wakeup_s4()) {
+ if (acpi_is_wakeup_s4()) {
outb(0xEE, PM_INDEX);
outb(0x8, PM_DATA);
}