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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-04-03 14:57:36 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-04-06 21:02:06 +0200
commit353293580e43767e89efd37375cdddd733cafbb4 (patch)
tree5dee46e1d67c58b3b20e55fc8ae393625bda58bc /src/mainboard/amd/bettong
parenta304b69a45fdb210e47e98af95a2e80277c588d5 (diff)
downloadcoreboot-353293580e43767e89efd37375cdddd733cafbb4.tar.xz
amd/bettong: Move OemPostParams() to correct file
The term 'callout' has a specific meaning in AGESA, meaning invoking the said function from AGESA / PI proper. OemPostParams() does not fall into that category. Change-Id: I45913d93323b3813fc35b1dd1fdca3d782d4b01f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/19140 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/amd/bettong')
-rw-r--r--src/mainboard/amd/bettong/BiosCallOuts.c23
-rw-r--r--src/mainboard/amd/bettong/OemCustomize.c21
2 files changed, 21 insertions, 23 deletions
diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c
index a2eeec7993..0fe8bd5ec7 100644
--- a/src/mainboard/amd/bettong/BiosCallOuts.c
+++ b/src/mainboard/amd/bettong/BiosCallOuts.c
@@ -31,7 +31,6 @@
#include "BiosCallOuts.h"
#include "northbridge/amd/pi/dimmSpd.h"
#include "northbridge/amd/pi/agesawrapper.h"
-#include <PlatformMemoryConfiguration.h>
#include <boardid.h>
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr);
@@ -140,25 +139,3 @@ static AGESA_STATUS board_ReadSpd(UINT32 Func, UINTN Data, VOID *ConfigPtr)
#endif
return AGESA_SUCCESS;
}
-
-#ifdef __PRE_RAM__
-
-const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
- DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
- NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
- NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
- MOTHER_BOARD_LAYERS (LAYERS_6),
- MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
- CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff),
- ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff),
- CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
- PSO_END
-};
-
-void OemPostParams(AMD_POST_PARAMS *PostParams)
-{
- if (board_id() == 'F') {
- PostParams->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)DDR4PlatformMemoryConfiguration;
- }
-}
-#endif
diff --git a/src/mainboard/amd/bettong/OemCustomize.c b/src/mainboard/amd/bettong/OemCustomize.c
index a32ea9a424..8d1ad4bdb5 100644
--- a/src/mainboard/amd/bettong/OemCustomize.c
+++ b/src/mainboard/amd/bettong/OemCustomize.c
@@ -14,6 +14,8 @@
*/
#include <northbridge/amd/pi/agesawrapper.h>
+#include <PlatformMemoryConfiguration.h>
+#include <boardid.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
@@ -132,3 +134,22 @@ VOID OemCustomizeInitEarly (
{
InitEarly->GnbConfig.PcieComplexList = &PcieComplex;
}
+
+static const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
+ DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
+ NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
+ NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
+ MOTHER_BOARD_LAYERS (LAYERS_6),
+ MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
+ CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff),
+ ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff),
+ CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
+ PSO_END
+};
+
+void OemPostParams(AMD_POST_PARAMS *PostParams)
+{
+ if (board_id() == 'F') {
+ PostParams->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)DDR4PlatformMemoryConfiguration;
+ }
+}