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authorKostr <aladyshev@nicevt.ru>2012-09-26 22:11:20 +0400
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-10-05 22:17:33 +0200
commitee00e7bd7378bf229c33389d52793ee8c40017ee (patch)
tree0d065d1d884c048a7b17527491b0e9297e250d50 /src/mainboard/amd/dinar
parent9b757dccdca1ca4a14fdc8351600652d798dc715 (diff)
downloadcoreboot-ee00e7bd7378bf229c33389d52793ee8c40017ee.tar.xz
Mainboard: Fix IO-HUB link number in Dinar mainboard
According to file "northbridge.c" in family 15h code IO-HUB should be placed on link_lsit[0] in devicetree.cb. This hack in "northbridge.c" was made to satisfy both f10 and f15 cpu's. Change-Id: I4754235bd38239460347b0dc4a82cd4e58ae7cd0 Signed-off-by: Kostr <aladyshev@nicevt.ru> Reviewed-on: http://review.coreboot.org/1540 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/amd/dinar')
-rw-r--r--src/mainboard/amd/dinar/devicetree.cb3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/amd/dinar/devicetree.cb b/src/mainboard/amd/dinar/devicetree.cb
index 92fe5215d3..3211a2f8a5 100644
--- a/src/mainboard/amd/dinar/devicetree.cb
+++ b/src/mainboard/amd/dinar/devicetree.cb
@@ -26,8 +26,7 @@ chip northbridge/amd/agesa/family15/root_complex
device pci_domain 0 on
subsystemid 0x1022 0x1705 inherit
chip northbridge/amd/agesa/family15 # CPU side of HT root complex
- device pci 18.0 on end # Link 0
- device pci 18.0 on # Link 1, IO-HUB on socket0 link 2(internal Node0 Link 1)
+ device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology to satisfy both f10 and f15 CPUs
chip northbridge/amd/cimx/rd890 # North Bridge PCI side of HT Root complex
device pci 0.0 on end # HT Root Complex
device pci 0.1 off end # CLKCONFIG