diff options
| author | Marc Jones <marcj303@gmail.com> | 2017-05-05 16:15:31 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-26 00:46:30 +0000 |
| commit | 2df118cdf04c72156ca92b940063288968ca7cea (patch) | |
| tree | fe3ed54c1cc3fffc69ca07f52bfbafd2a67f5fe4 /src/mainboard/amd/gardenia/BiosCallOuts.c | |
| parent | 1587dc8a2b4ddfe110cd0239c6506a320cccac96 (diff) | |
| download | coreboot-2df118cdf04c72156ca92b940063288968ca7cea.tar.xz | |
amd/gardenia: Switch to soc/amd/stoneyridge
Switch Garnenia mainboard to single soc/ directory structure.
Change-Id: I095804d603bcccf324d3244965081a9dccba62ae
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/gardenia/BiosCallOuts.c')
| -rw-r--r-- | src/mainboard/amd/gardenia/BiosCallOuts.c | 34 |
1 files changed, 15 insertions, 19 deletions
diff --git a/src/mainboard/amd/gardenia/BiosCallOuts.c b/src/mainboard/amd/gardenia/BiosCallOuts.c index 23ce0c6304..f8d02a5614 100644 --- a/src/mainboard/amd/gardenia/BiosCallOuts.c +++ b/src/mainboard/amd/gardenia/BiosCallOuts.c @@ -15,22 +15,18 @@ #include <device/pci_def.h> #include <device/device.h> -#include "AGESA.h" -#include "amdlib.h" -#include <northbridge/amd/pi/BiosCallOuts.h> -#include <northbridge/amd/pi/00670F00/chip.h> -#include "Ids.h" -#include "heapManager.h" -#include "FchPlatform.h" -#include "cbfs.h" -#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) -#include "imc.h" -#endif -#include "hudson.h" +#include <AGESA.h> +#include <amdlib.h> +#include <BiosCallOuts.h> +#include <Ids.h> +#include <heapManager.h> +#include <FchPlatform.h> +#include <cbfs.h> +#include <soc/imc.h> +#include <soc/hudson.h> #include <stdlib.h> -#include "BiosCallOuts.h" -#include "northbridge/amd/pi/dimmSpd.h" -#include "northbridge/amd/pi/agesawrapper.h" +#include <dimmSpd.h> +#include <agesawrapper.h> static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr); @@ -95,12 +91,12 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) } else if (StdHeader->Func == AMD_INIT_ENV) { FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; printk(BIOS_DEBUG, "Fch OEM config in INIT ENV "); -#if IS_ENABLED(CONFIG_HUDSON_IMC_FWM) +#if IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM) oem_fan_control(FchParams_env); #endif /* XHCI configuration */ -#if CONFIG_HUDSON_XHCI_ENABLE +#if CONFIG_STONEYRIDGE_XHCI_ENABLE FchParams_env->Usb.Xhci0Enable = TRUE; #else FchParams_env->Usb.Xhci0Enable = FALSE; @@ -109,8 +105,8 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr) FchParams_env->Usb.USB30PortInit = 8; /* 8: If USB3 port is unremoveable. */ /* SATA configuration */ - FchParams_env->Sata.SataClass = CONFIG_HUDSON_SATA_MODE; - switch ((SATA_CLASS)CONFIG_HUDSON_SATA_MODE) { + FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE; + switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) { case SataRaid: case SataAhci: case SataAhci7804: |