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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-05-10 09:23:42 +0200
committerBruce Griffith <Bruce.Griffith@se-eng.com>2013-05-14 04:49:03 +0200
commit8c8af592ca20e6c2dc48bea2c3ae66aa92c9dca7 (patch)
tree49b901570dad1ce41bcb354faf4d2f4d69ff9155 /src/mainboard/amd/inagua
parentc49ae3c655172c98b31bde50796fccf42683ee9f (diff)
downloadcoreboot-8c8af592ca20e6c2dc48bea2c3ae66aa92c9dca7.tar.xz
AMD Brazos/Trinity boards: PlatformGnbPcie.c: Reserve correct amount of memory
In `PlatformGnbPcie.c` AGESA functions are used to reserve memory space to save the PCIe configuration to. This is the With the following definitions in `AGESA.h` $ more src/vendorcode/amd/agesa/f14/AGESA.h […] /// PCIe port descriptor typedef struct { IN UINT32 Flags; /**< Descriptor flags * @li @b Bit31 - last descriptor in complex */ IN PCIe_ENGINE_DATA EngineData; ///< Engine data IN PCIe_PORT_DATA Port; ///< PCIe port specific configuration info } PCIe_PORT_DESCRIPTOR; /// DDI descriptor typedef struct { IN UINT32 Flags; /**< Descriptor flags * @li @b Bit31 - last descriptor in complex */ IN PCIe_ENGINE_DATA EngineData; ///< Engine data IN PCIe_DDI_DATA Ddi; ///< DDI port specific configuration info } PCIe_DDI_DESCRIPTOR; /// PCIe Complex descriptor typedef struct { IN UINT32 Flags; /**< Descriptor flags * @li @b Bit31 - last descriptor in topology */ IN UINT32 SocketId; ///< Socket Id IN PCIe_PORT_DESCRIPTOR *PciePortList; ///< Pointer to array of PCIe port descriptors or NULL (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST). IN PCIe_DDI_DESCRIPTOR *DdiLinkList; ///< Pointer to array DDI link descriptors (Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST). IN VOID *Reserved; ///< Reserved for future use } PCIe_COMPLEX_DESCRIPTOR; […] memory has to be reserved for the `PCIe_COMPLEX_DESCRIPTOR` and, as two struct members are pointers to arrays with elements of type `PCIe_PORT_DESCRIPTOR` and `PCIe_DDI_DESCRIPTOR`, space for these times the number of array elements have to be reserved: a + b * 5 + c * 2. sizeof(PCIe_COMPLEX_DESCRIPTOR) + sizeof(PCIe_PORT_DESCRIPTOR) * 5 + sizeof(PCIe_DDI_DESCRIPTOR) * 2; But for whatever reason parentheses were put in there making this calculation incorrect and reserving too much memory. (a + b * 5 + c) * 2 So, remove the parentheses to reserve the exact amount of memory needed. The ASRock E350M1 still boots with these changes. No changes were observed as expected. Rudolf Marek made this change as part of his patch »ASUS F2A85-M: Correct and clean up PCIe config« [1]. Factor this hunk out as it affects all AMD Brazos and Trinity based boards. [1] http://review.coreboot.org/#/c/3194/ Change-Id: I32e8c8a3dfc5e87eb119eb17719d612e57e0817a Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3239 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Jens Rottmann <JRottmann@LiPPERTembedded.de> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src/mainboard/amd/inagua')
-rw-r--r--src/mainboard/amd/inagua/PlatformGnbPcie.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/amd/inagua/PlatformGnbPcie.c b/src/mainboard/amd/inagua/PlatformGnbPcie.c
index 0eea211946..ac5eca3da8 100644
--- a/src/mainboard/amd/inagua/PlatformGnbPcie.c
+++ b/src/mainboard/amd/inagua/PlatformGnbPcie.c
@@ -108,9 +108,9 @@ OemCustomizeInitEarly (
//
// Allocate buffer for PCIe_COMPLEX_DESCRIPTOR , PCIe_PORT_DESCRIPTOR and PCIe_DDI_DESCRIPTOR
//
- AllocHeapParams.RequestedBufferSize = (sizeof (PCIe_COMPLEX_DESCRIPTOR) +
+ AllocHeapParams.RequestedBufferSize = sizeof (PCIe_COMPLEX_DESCRIPTOR) +
sizeof (PCIe_PORT_DESCRIPTOR) * 5 +
- sizeof (PCIe_DDI_DESCRIPTOR)) * 2;
+ sizeof (PCIe_DDI_DESCRIPTOR) * 2;
AllocHeapParams.BufferHandle = AMD_MEM_MISC_HANDLES_START;
AllocHeapParams.Persist = HEAP_LOCAL_CACHE;