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authorSiyuan Wang <wangsiyuanbuaa@gmail.com>2013-07-09 17:42:43 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-08-05 22:09:00 +0200
commit80cf7d5956283b5c79b293d2ffac82f329f6203c (patch)
tree40378cdc52cbf1a8b3c821c05fab44eae353dbfa /src/mainboard/amd/olivehill/Kconfig
parent37a1d6c9552b267c06c471cced5928d2385767e2 (diff)
downloadcoreboot-80cf7d5956283b5c79b293d2ffac82f329f6203c.tar.xz
AMD Olive Hill: Add new AMD mainboard using Kabini processor
Change-Id: I1f252b67c039d28df96e8dfd458a1ca6a7dbc816 Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com> Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com> Reviewed-by: Bruce Griffith <bruce.griffith@se-eng.com> Tested-by: Bruce Griffith <bruce.griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/3784 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com>
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diff --git a/src/mainboard/amd/olivehill/Kconfig b/src/mainboard/amd/olivehill/Kconfig
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+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2012 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+
+if BOARD_AMD_OLIVEHILL
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select ARCH_X86
+ select CPU_AMD_AGESA_FAMILY16_KB
+ select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
+ select SOUTHBRIDGE_AMD_AGESA_YANGTZE
+ select HAVE_OPTION_TABLE
+ select HAVE_PIRQ_TABLE
+ select HAVE_MP_TABLE
+ select HAVE_ACPI_RESUME
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select LIFT_BSP_APIC_ID
+ select SERIAL_CPU_INIT
+ select AMDMCT
+ select HAVE_ACPI_TABLES
+ select BOARD_ROMSIZE_KB_4096
+ select GFXUMA
+
+config MAINBOARD_DIR
+ string
+ default amd/olivehill
+
+config APIC_ID_OFFSET
+ hex
+ default 0x0
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "DB-FT3"
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x200000
+
+config MAX_CPUS
+ int
+ default 4
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+
+config MEM_TRAIN_SEQ
+ int
+ default 2
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+
+config RAMTOP
+ hex
+ default 0x1000000
+
+config HEAP_SIZE
+ hex
+ default 0xc0000
+
+config ACPI_SSDTX_NUM
+ int
+ default 0
+
+config RAMBASE
+ hex
+ default 0x200000
+
+config ONBOARD_VGA_IS_PRIMARY
+ bool
+ default y
+
+config VGA_BIOS_ID
+ string
+ default "1002,9832"
+
+config WARNINGS_ARE_ERRORS
+ bool
+ default n
+
+endif # BOARD_AMD_OLIVEHILL