diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-04-27 09:04:11 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-05-10 13:47:08 +0200 |
| commit | 53052fe5eefe8396b334e8bc8c1014fca4062a8f (patch) | |
| tree | c1d3e8f847d381f0ba11a3902022d88543bd81bb /src/mainboard/amd/olivehill/OemCustomize.c | |
| parent | a5d72a3170a4757375ee8f5e501da2a08dd7c5ae (diff) | |
| download | coreboot-53052fe5eefe8396b334e8bc8c1014fca4062a8f.tar.xz | |
AGESA boards: Relocate platform memory config
File buildOpts.c is a can of worms, pull platform memory
configuration in to OemCustomize.c. This array should be
assigned at runtime instead of linking a modified defaults
table.
Change-Id: I73d9d3fbc165e6c10472e105576d7c40820eaa6a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14528
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/amd/olivehill/OemCustomize.c')
| -rw-r--r-- | src/mainboard/amd/olivehill/OemCustomize.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/amd/olivehill/OemCustomize.c b/src/mainboard/amd/olivehill/OemCustomize.c index 0e307ee092..70c50352af 100644 --- a/src/mainboard/amd/olivehill/OemCustomize.c +++ b/src/mainboard/amd/olivehill/OemCustomize.c @@ -17,6 +17,7 @@ #include "amdlib.h" #include "Ids.h" #include "heapManager.h" +#include <PlatformMemoryConfiguration.h> #include "Filecode.h" #include <northbridge/amd/agesa/agesawrapper.h> @@ -151,6 +152,36 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid) return AGESA_SUCCESS; } +/*---------------------------------------------------------------------------------------- + * CUSTOMER OVERIDES MEMORY TABLE + *---------------------------------------------------------------------------------------- + */ + +/* + * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA + * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable + * is populated, AGESA will base its settings on the data from the table. Otherwise, it will + * use its default conservative settings. + */ +CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { + #define SEED_A 0x12 + HW_RXEN_SEED( + ANY_SOCKET, CHANNEL_A, ALL_DIMMS, + SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, + SEED_A), + + NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), + NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1), + MOTHER_BOARD_LAYERS (LAYERS_4), + + MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00), + CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), /* TODO: bit2map, bit3map */ + ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08), + CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00), + + PSO_END +}; + const struct OEM_HOOK OemCustomize = { .InitEarly = OemInitEarly, .InitMid = OemInitMid, |