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author | Siyuan Wang <wangsiyuanbuaa@gmail.com> | 2013-07-09 17:42:43 +0800 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-08-05 22:09:00 +0200 |
commit | 80cf7d5956283b5c79b293d2ffac82f329f6203c (patch) | |
tree | 40378cdc52cbf1a8b3c821c05fab44eae353dbfa /src/mainboard/amd/olivehill/mainboard.c | |
parent | 37a1d6c9552b267c06c471cced5928d2385767e2 (diff) | |
download | coreboot-80cf7d5956283b5c79b293d2ffac82f329f6203c.tar.xz |
AMD Olive Hill: Add new AMD mainboard using Kabini processor
Change-Id: I1f252b67c039d28df96e8dfd458a1ca6a7dbc816
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Reviewed-by: Bruce Griffith <bruce.griffith@se-eng.com>
Tested-by: Bruce Griffith <bruce.griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/3784
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin.roth@se-eng.com>
Diffstat (limited to 'src/mainboard/amd/olivehill/mainboard.c')
-rw-r--r-- | src/mainboard/amd/olivehill/mainboard.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/src/mainboard/amd/olivehill/mainboard.c b/src/mainboard/amd/olivehill/mainboard.c new file mode 100644 index 0000000000..0a3f9a5eda --- /dev/null +++ b/src/mainboard/amd/olivehill/mainboard.c @@ -0,0 +1,51 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <arch/io.h> +#include <cpu/x86/msr.h> +#include <cpu/amd/mtrr.h> +#include <device/pci_def.h> +#include <arch/acpi.h> +#include "BiosCallOuts.h" +#include <cpu/amd/agesa/s3_resume.h> +#include "agesawrapper.h" + +/********************************************** + * enable the dedicated function in mainboard. + **********************************************/ +static void mainboard_enable(device_t dev) +{ + printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); + /* + * The mainboard is the first place that we get control in ramstage. Check + * for S3 resume and call the approriate AGESA/CIMx resume functions. + */ +#if CONFIG_HAVE_ACPI_RESUME + acpi_slp_type = acpi_get_sleep_type(); + if (acpi_slp_type == 3) + agesawrapper_fchs3earlyrestore(); +#endif +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; |