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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-21 19:35:16 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-24 13:59:22 +0200 |
| commit | 0c797f1c28cd16c64482b2cea554e89baaa31445 (patch) | |
| tree | 0eb73249b03eb0609e350250c32b4f0bdab3bcaf /src/mainboard/amd/olivehill | |
| parent | 0ff17c9cae11b46535b99880f013d0ca084ea1f8 (diff) | |
| download | coreboot-0c797f1c28cd16c64482b2cea554e89baaa31445.tar.xz | |
AGESA: Drop offset on PCI device enumeration
Integrated PCI devices in southbridge silicon have static BDFs,
no need to have variables to store the parent bus or an offset
with constant zero.
Change-Id: I37d3794d36b5e5775da9215574ddc199696646d0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6333
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/amd/olivehill')
| -rw-r--r-- | src/mainboard/amd/olivehill/get_bus_conf.c | 18 | ||||
| -rw-r--r-- | src/mainboard/amd/olivehill/irq_tables.c | 8 |
2 files changed, 5 insertions, 21 deletions
diff --git a/src/mainboard/amd/olivehill/get_bus_conf.c b/src/mainboard/amd/olivehill/get_bus_conf.c index 508a73cfba..1dda593943 100644 --- a/src/mainboard/amd/olivehill/get_bus_conf.c +++ b/src/mainboard/amd/olivehill/get_bus_conf.c @@ -35,17 +35,6 @@ u8 bus_yangtze[6]; u32 apicid_yangtze; -/* - * Here you only need to set value in pci1234 for HT-IO that could be installed or not - * You may need to preset pci1234 for HTIO board, - * please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail - */ -u32 pci1234x[] = { - 0x0000ff0, -}; - -u32 sbdn_yangtze; - void get_bus_conf(void) { @@ -66,23 +55,20 @@ void get_bus_conf(void) value &= ~(1 << 11); pci_write_config32(dev, 0x60, value); - sbdn_yangtze = 0; memset(bus_yangtze, 0, sizeof(bus_yangtze)); - // bus_yangtze[0] = (sysconf.pci1234[0] >> 16) & 0xff; - bus_yangtze[0] = (pci1234x[0] >> 16) & 0xff; /* yangtze */ - dev = dev_find_slot(bus_yangtze[0], PCI_DEVFN(sbdn_yangtze + 0x14, 4)); + dev = dev_find_slot(0, PCI_DEVFN(0x14, 4)); if (dev) { bus_yangtze[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); } for (i = 0; i < 4; i++) { - dev = dev_find_slot(bus_yangtze[0], PCI_DEVFN(sbdn_yangtze + 0x14, i)); + dev = dev_find_slot(0, PCI_DEVFN(0x14, i)); if (dev) { bus_yangtze[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); } diff --git a/src/mainboard/amd/olivehill/irq_tables.c b/src/mainboard/amd/olivehill/irq_tables.c index 8dbea45ed4..22ed1ab0a8 100644 --- a/src/mainboard/amd/olivehill/irq_tables.c +++ b/src/mainboard/amd/olivehill/irq_tables.c @@ -43,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, pirq_info->rfu = rfu; } -extern u8 bus_yangtze[6]; -extern unsigned long sbdn_yangtze; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -69,8 +67,8 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; - pirq->rtr_bus = bus_yangtze[0]; - pirq->rtr_devfn = ((sbdn_yangtze + 0x14) << 3) | 4; + pirq->rtr_bus = 0; + pirq->rtr_devfn = PCI_DEVFN(0x14, 4); pirq->exclusive_irqs = 0; @@ -85,7 +83,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) slot_num = 0; /* pci bridge */ - write_pirq_info(pirq_info, bus_yangtze[0], ((sbdn_yangtze + 0x14) << 3) | 4, + write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; |