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author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-11-06 17:11:05 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 17:11:05 +0000 |
commit | d63085b20ef40caae1c60a7532b5243e1e30b109 (patch) | |
tree | c732b7666d8082775022592eeddedff81375eeef /src/mainboard/amd/pistachio/Config.lb | |
parent | eeec0ef00a6be64d6846599fe7cf81ead22e2f02 (diff) | |
download | coreboot-d63085b20ef40caae1c60a7532b5243e1e30b109.tar.xz |
Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.
Since we have CBFS setting rom_address in board files is no longer
necessary.
Also, drop vga_rom_address from RS690 completely, it was never used
in the code.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio/Config.lb')
-rw-r--r-- | src/mainboard/amd/pistachio/Config.lb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/amd/pistachio/Config.lb b/src/mainboard/amd/pistachio/Config.lb index 6ada7d636e..146ab50bf9 100644 --- a/src/mainboard/amd/pistachio/Config.lb +++ b/src/mainboard/amd/pistachio/Config.lb @@ -158,7 +158,6 @@ chip northbridge/amd/amdk8/root_complex device pci 1.0 on # Internal Graphics P2P bridge 0x7912 chip drivers/pci/onboard device pci 5.0 on end # Internal Graphics 0x791F - register "rom_address" = "0xfff00000" end end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 |