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author | Myles Watson <mylesgw@gmail.com> | 2009-11-06 23:42:26 +0000 |
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committer | Myles Watson <mylesgw@gmail.com> | 2009-11-06 23:42:26 +0000 |
commit | d27c08c2898d1d74765a7799628d1c18369fd671 (patch) | |
tree | 7ac357d2b44d833c6efe70d1e691c6611c521e8d /src/mainboard/amd/pistachio/Config.lb | |
parent | 547d48ab01049a634dccb16d1847524d5ba93e33 (diff) | |
download | coreboot-d27c08c2898d1d74765a7799628d1c18369fd671.tar.xz |
Remove drivers/pci/onboard. The only purpose was for option ROMs, which are
now handled more generically using CBFS.
Simplify the option ROM code in device/pci_rom.c, since there are only two ways
to get a ROM address now (CBFS and the device) and add an exception for qemu.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio/Config.lb')
-rw-r--r-- | src/mainboard/amd/pistachio/Config.lb | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/amd/pistachio/Config.lb b/src/mainboard/amd/pistachio/Config.lb index 93925fa9af..1f59668328 100644 --- a/src/mainboard/amd/pistachio/Config.lb +++ b/src/mainboard/amd/pistachio/Config.lb @@ -156,9 +156,7 @@ chip northbridge/amd/amdk8/root_complex device pci 0.0 on end # HT 0x7910 # device pci 0.1 off end # CLK device pci 1.0 on # Internal Graphics P2P bridge 0x7912 - chip drivers/pci/onboard - device pci 5.0 on end # Internal Graphics 0x791F - end + device pci 5.0 on end # Internal Graphics 0x791F end device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913 device pci 3.0 off end # PCIE P2P bridge 0x791b |