diff options
author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 14:10:28 +0000 |
---|---|---|
committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 14:10:28 +0000 |
commit | 00f0267f7805f6d27d78c1ed586ac0f13c90637b (patch) | |
tree | 1f7501094bfe358b0e0d09159e3402c3504bf4f8 /src/mainboard/amd/pistachio/Kconfig | |
parent | 91ff0df62777a9ec4a399ef899803c05e7caad60 (diff) | |
download | coreboot-00f0267f7805f6d27d78c1ed586ac0f13c90637b.tar.xz |
Remaining boards are Kconfig'd now. Whether they work
or not still depends on how close the configuration
options are to what they should be.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio/Kconfig')
-rw-r--r-- | src/mainboard/amd/pistachio/Kconfig | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/src/mainboard/amd/pistachio/Kconfig b/src/mainboard/amd/pistachio/Kconfig new file mode 100644 index 0000000000..170d1212eb --- /dev/null +++ b/src/mainboard/amd/pistachio/Kconfig @@ -0,0 +1,103 @@ +config BOARD_AMD_PISTACHIO + bool "Pistachio" + select ARCH_X86 + select CPU_AMD_K8 + select CPU_AMD_SOCKET_AM2 + select NORTHBRIDGE_AMD_AMDK8 + select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX + select SOUTHBRIDGE_AMD_RS690 + select SOUTHBRIDGE_AMD_SB600 + select HAVE_PIRQ_TABLE + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM + select HAVE_HARD_RESET + select IOAPIC + select AP_CODE_IN_CAR + select SB_HT_CHAIN_UNITID_OFFSET_ONLY + select WAIT_BEFORE_CPUS_INIT + select HAVE_ACPI_TABLES + +config MAINBOARD_DIR + string + default amd/pistachio + depends on BOARD_AMD_PISTACHIO + +config DCACHE_RAM_BASE + hex + default 0xc8000 + depends on BOARD_AMD_PISTACHIO + +config DCACHE_RAM_SIZE + hex + default 0x08000 + depends on BOARD_AMD_PISTACHIO + +config DCACHE_RAM_GLOBAL_VAR_SIZE + hex + default 0x01000 + depends on BOARD_AMD_PISTACHIO + +config APIC_ID_OFFSET + hex + default 0x8 + depends on BOARD_AMD_PISTACHIO + +config LB_CKS_RANGE_END + int + default 122 + depends on BOARD_AMD_PISTACHIO + +config LB_CKS_LOC + int + default 123 + depends on BOARD_AMD_PISTACHIO + +config MAINBOARD_PART_NUMBER + string + default "PISTACHIO" + depends on BOARD_AMD_PISTACHIO + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_AMD_PISTACHIO + +config MAX_CPUS + int + default 2 + depends on BOARD_AMD_PISTACHIO + +config MAX_PHYSICAL_CPUS + int + default 1 + depends on BOARD_AMD_PISTACHIO + +config HW_MEM_HOLE_SIZE_AUTO_INC + bool + default n + depends on BOARD_AMD_PISTACHIO + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_AMD_PISTACHIO + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x6 + depends on BOARD_AMD_PISTACHIO + +config HT_CHAIN_UNITID_BASE + hex + default 0xa + depends on BOARD_AMD_PISTACHIO + +config USE_INIT + bool + default n + depends on BOARD_AMD_PISTACHIO + +config IRQ_SLOT_COUNT + int + default 11 + depends on BOARD_AMD_PISTACHIO |