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| author | Zheng Bao <zheng.bao@amd.com> | 2009-10-16 07:44:04 +0000 |
|---|---|---|
| committer | Zheng Bao <Zheng.Bao@amd.com> | 2009-10-16 07:44:04 +0000 |
| commit | 289a2f5aad4eb8b231083ce4250bc382dad6cdbc (patch) | |
| tree | acc88f778d55d6e437fa606a846b337664ffe6ad /src/mainboard/amd/pistachio/Options.lb | |
| parent | 9d37532bc1075360c3f1eca8f000afd7c178de5a (diff) | |
| download | coreboot-289a2f5aad4eb8b231083ce4250bc382dad6cdbc.tar.xz | |
Add CONFIG_VGA_ROM_RUN to dbm690t and pistachio, otherwise the
VGA ROM can not run. After make, run
> ./cbfs/cbfstool ./coreboot.rom add ../vga_bios.rom pci1002,791f.rom optionrom
to make the final image with vga bios.
The macro vga_rom_address is out-of-date when CBFS starts play its role. it also should
be eliminated from rs690/chip.h as below. But it will cause building error on other board, which I
cant make test on.
## Index: src/southbridge/amd/rs690/chip.h
## ===================================================================
## --- src/southbridge/amd/rs690/chip.h (revision 4782)
## +++ src/southbridge/amd/rs690/chip.h (working copy)
## @@ -23,7 +23,6 @@
## /* Member variables are defined in Config.lb. */
## struct southbridge_amd_rs690_config
## {
## - u32 vga_rom_address; /* The location that the VGA rom has been appened. */
## u8 gpp_configuration; /* The configuration of General Purpose Port, A/B/C/D/E. */
## u8 port_enable; /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */
## u8 gfx_dev2_dev3; /* for GFX Core initialization REFCLK_SEL */
##
Don't apply above patch about rs690/chip.h before every board has been fixed.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio/Options.lb')
| -rw-r--r-- | src/mainboard/amd/pistachio/Options.lb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/amd/pistachio/Options.lb b/src/mainboard/amd/pistachio/Options.lb index 0082151c7d..922edf5210 100644 --- a/src/mainboard/amd/pistachio/Options.lb +++ b/src/mainboard/amd/pistachio/Options.lb @@ -73,6 +73,7 @@ uses HOSTCC uses CONFIG_OBJCOPY uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN +uses CONFIG_VGA_ROM_RUN uses CONFIG_HW_MEM_HOLE_SIZEK uses CONFIG_HT_CHAIN_UNITID_BASE uses CONFIG_HT_CHAIN_END_UNITID_BASE @@ -158,6 +159,7 @@ default CONFIG_HW_MEM_HOLE_SIZEK=0x100000 #VGA Console default CONFIG_CONSOLE_VGA=1 default CONFIG_PCI_ROM_RUN=1 +default CONFIG_VGA_ROM_RUN=1 # BTDC: Only one HT device on Herring. #HT Unit ID offset |