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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-30 17:46:17 +0200
committerMartin Roth <martinroth@google.com>2016-08-14 19:06:25 +0200
commit8ab989e31561cea0c6af5d5e242dd2be97bc73b4 (patch)
tree31bc3a2175762b179d2fc093c34f62c18b15b9ee /src/mainboard/amd/pistachio/fadt.c
parent589ef9de8faa2db11a7ce2769fc1d9396a82886b (diff)
downloadcoreboot-8ab989e31561cea0c6af5d5e242dd2be97bc73b4.tar.xz
src/mainboard: Capitalize ROM, RAM, CPU and APIC
Change-Id: Ia1f24d328a065a54975adde067df36c5751bff2d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15987 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/pistachio/fadt.c')
-rw-r--r--src/mainboard/amd/pistachio/fadt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/pistachio/fadt.c b/src/mainboard/amd/pistachio/fadt.c
index 4afb0b9e4c..f9768b20bd 100644
--- a/src/mainboard/amd/pistachio/fadt.c
+++ b/src/mainboard/amd/pistachio/fadt.c
@@ -25,7 +25,7 @@
#include "southbridge/amd/sb600/sb600.h"
/*extern*/ u16 pm_base = 0x800;
-/* pm_base should be set in sb acpi */
+/* pm_base should be set in sb ACPI */
/* pm_base should be got from bar2 of rs690. Here I compact ACPI
* registers into 32 bytes limit.
* */