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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 22:47:22 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 22:47:22 +0000
commit7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch)
tree5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/amd/pistachio
parent57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff)
downloadcoreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/pistachio')
-rw-r--r--src/mainboard/amd/pistachio/romstage.c20
1 files changed, 4 insertions, 16 deletions
diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c
index 18a4d263bf..187eb207c2 100644
--- a/src/mainboard/amd/pistachio/romstage.c
+++ b/src/mainboard/amd/pistachio/romstage.c
@@ -42,17 +42,9 @@
#include "southbridge/amd/sb600/sb600_early_setup.c"
#include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
-/* CAN'T BE REMOVED! memory bus reset hook for some broken amd k8 boards. */
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-}
-
-/* called in raminit_f.c */
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-}
+static void memreset(int controllers, const struct mem_controller *ctrl) { }
+static void activate_spd_rom(const struct mem_controller *ctrl) { }
-/*called in raminit_f.c */
static inline int spd_read_byte(u32 device, u32 address)
{
return smbus_read_byte(device, address);
@@ -85,14 +77,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Nothing special needs to be done to find bus 0 */
/* Allow the HT devices to be found */
enumerate_ht_chain();
-
sb600_lpc_port80();
/* sb600_pci_port80(); */
}
- if (bist == 0) {
+ if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
- }
enable_rs690_dev8();
sb600_lpc_init();
@@ -138,8 +128,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Check to see if processor is capable of changing FIDVID */
/* otherwise it will throw a GP# when reading FIDVID_STATUS */
cpuid1 = cpuid(0x80000007);
- if( (cpuid1.edx & 0x6) == 0x6 ) {
-
+ if ((cpuid1.edx & 0x6) == 0x6) {
/* Read FIDVID_STATUS */
msr=rdmsr(0xc0010042);
printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
@@ -151,7 +140,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* show final fid and vid */
msr=rdmsr(0xc0010042);
printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
-
} else {
printk(BIOS_DEBUG, "Changing FIDVID not supported\n");
}